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HT36F2 参数 Datasheet PDF下载

HT36F2图片预览
型号: HT36F2
PDF下载: 下载PDF文件 查看货源
内容描述: 36Music合成的8位MCU [36Music Synthesizer 8-Bit MCU]
分类和应用:
文件页数/大小: 36 页 / 267 K
品牌: HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
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HT36F2
and the other type is for wavetable code, which is ad-
dressed by the start address ST15~ST0. On the pro-
gram type, WA15~WA0=PF1~PF0´2
13
+PC12~PC0.
O n t h e w ave t abl e R O M t y p e , W A 1 5 ~W A0 =
ST15~ST0´2
5
.
Program Memory
-
ROM
The program memory is used to store the program in-
structions which are to be executed. It also contains
data, table, and interrupt entries, and is organized into
8192´16 bits, addressed by the bank pointer, program
counter and table pointer.
Certain locations in the program memory of each bank
are reserved for special usage:
·
Location 000H on bank0
0 0 0 0 H
0 0 0 8 H
0 0 0 C H
D e v ic e in itia liz a tio n p r o g r a m
T im e r C o u n te r 0 in te r r u p t s u b r o u tin e
T im e r C o u n te r 1 in te r r u p t s u b r o u tin e
P ro g ra m
R O M
n 0 0 H
n F F H
L o o k - u p ta b le ( 2 5 6 w o r d s )
1 F F F H
L o o k - u p ta b le ( 2 5 6 w o r d s )
1 6 b its
N o te : n ra n g e s fro m
0 0 to 3 F .
Program Memory for Each Bank
be placed in TBLP. The TBLH is read only and cannot
be restored. If the main routine and the ISR (Interrupt
Service Routine) both employ the table read instruc-
tion, the contents of the TBLH in the main routine are
likely to be changed by the table read instruction used
in the ISR. Errors can occur. In this case, using the ta-
ble read instruction in the main routine and the ISR si-
multaneously should be avoided. However, if the
table read instruction has to be applied in both the
main routine and the ISR, the interrupt should be dis-
abled prior to the table read instruction. It will not be
enabled until the TBLH has been backed up. All table
related instructions need 2 cycles to complete the op-
eration. These areas may function as normal program
memory depending upon user requirements.
·
Bank pointer
This area is reserved for the initialization program. Af-
ter chip reset, the program always begins execution at
location 000H on bank0.
·
Location 008H
This area is reserved for the Timer Counter 0 interrupt
service program on each bank. If timer interrupt results
from a timer counter 0 overflow, and if the interrupt is en-
abled and the stack is not full, the program begins exe-
cution at location 008H corresponding to its bank.
·
Location 00CH
This area is reserved for the Timer Counter 1 interrupt
service program on each bank. If a timer interrupt re-
sults from a Timer Counter 1 overflow, and if the inter-
rupt is enabled and the stack is not full, the program
begins execution at location 00CH corresponding to
its bank.
·
Table location
Any location in the ROM space can be used as
look-up tables. The instructions
²TABRDC
[m]² (the
current page, 1 page=256 words) and
²TABRDL
[m]²
(the last page) transfer the contents of the lower-order
byte to the specified data memory, and the
higher-order byte to TBLH (08H). Only the destination
of the lower-order byte in the table is well-defined, the
higher-order byte of the table word are transferred to
the TBLH. The Table Higher-order byte register
(TBLH) is read only. The Table Pointer (TBLP) is a
read/write register (07H), which indicates the table lo-
cation. Before accessing the table, the location must
The program memory is organized into 4 banks and
each bank into 8192´16 bits of program ROM.
PF1~PF0 is used as the bank pointer. After an instruc-
tion has been executed to write data to the PF register
to select a different bank, note that the new bank will
not be selected immediately. It is not until the following
instruction has completed execution that the bank will
be actually selected. It should be note that the PF reg-
ister has to be cleared before setting to output mode.
Wavetable ROM
The ST15~ST0 is used to defined the start address of
each sample on the wavetable and read the waveform
data from the location. HT36F2 provides 16 output ad-
Table Location
Instruction (s)
TABRDC [m]
TABRDL [m]
*14
P14
P14
*13
P13
P13
*12
P12
1
*11
P11
1
*10
P10
1
*9
P9
1
*8
P8
1
*7
@7
@7
*6
@6
@6
*5
@5
@5
*4
@4
@4
*3
@3
@3
*2
@2
@2
*1
@1
@1
*0
@0
@0
Table Location
Note:
*12~*0: Bits of table location
@7~@0: Bits of table pointer
P12~P8: Bits of current Program Counter
P14~P13: Bits of Bank PF1~PF0
Rev. 1.00
6
August 15, 2005