PATENTED
HT1622/HT1622G
Pad Assignment
5
4
5
3
5
2
5
1
5
0
4
9
4
8
4
4
6
4
5
4
4
7
4
3
C
S
1
2
4
4
2
0
S
S
S
S
S
S
S
S
S
S
E
E
E
E
E
E
E
E
E
E
G
G
G
G
G
G
G
G
G
G
1
1
1
1
1
1
1
1
1
1
9
8
7
6
5
4
3
2
1
0
4
1
R
D
W
R
3
3
9
3
8
D
A
T
A
4
3
7
3
6
V
S
S
5
7
3
5
O
S
C
6
I
3
4
V
D
D
3
3
3
2
V
L
C
D
8
S
S
S
E
E
E
G
G
G
9
8
7
(
0
,
0
)
9
I
R
Q
3
1
3
0
B
Z
1
0
1
1
B
Z
T
1
1
2
T
T
2
1
3
3
1
4
C
O
M
0
1
1
1
5
6
C
O
M
2
3
2
4
2
5
2
6
2
7
2
8
2
9
1
7
1
8
1
9
2
0
2
1
2
2
Chip size: 94 ´ 98 (mil)2
Bump height: 18mm ± 3mm
Min. Bump spacing: 23.102mm
Bump size: 76 ´ 76mm2
* The IC substrate should be connected to VDD in the PCB layout artwork.
Rev. 2.40
3
April 2, 2012
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
