Dual-Power-Supply Model:
H8/3437F
Single-Power-Supply Model:
H8/3437F S-Mask Model
Item
Programming
mode timing
tMDS
tMDS
RES
RES
MD1,
MD1
MD0
12 V
12 V
P92,
P91,
P90
MD1
Min 0 µs
VPP
tMDS: 4tcyc (min.)
tMDS: 4tcyc (min.)
Prewrite
Required before erasing
Not required
processing
Programming
processing
Block corresponding to programming
address must be set in EBR1/EBR2
registers before programming
Settings at left not required
EBR register
configuration
EBR1,
EBR2EBR2
Memory map
(block
configuration)
SB0 (128 bytes)
SB1 (128 bytes)
SB2 (128 bytes)
SB3 (128 bytes)
SB4 (512 bytes)
SB5 (1 kbyte)
EB0 (1 kbyte)
EB1 (1 kbyte)
EB2 (1 kbyte)
EB3 (1 kbyte)
SB6 (1 kbyte)
SB7 (1 kbyte)
LB0 (4 kbytes)
LB1(8 kbytes)
60 kbytes
60 kbytes
EB4 (24 kbytes)
LB2 (8 kbytes)
LB3 (8 kbytes)
LB4 (8 kbytes)
LB5 (8 kbytes)
EB5 (16 kbytes)
EB6 (12 kbytes)
LB6 (12 kbytes)
LB7 (2 kbytes)
EB7 (2 kbytes)
Reset during
operation
Drive RES pin low for at least 10
Drive RES pin low for at least 20
system clock cycles (10ø). (RES pulse system clock cycles (20ø). (RES pulse
width tRESW = min. 10tcyc
)
width tRESW = min. 20tcyc)
HITACHI [ HITACHI SEMICONDUCTOR ]
