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HMNR1288D-70 参数 Datasheet PDF下载

HMNR1288D-70图片预览
型号: HMNR1288D-70
PDF下载: 下载PDF文件 查看货源
内容描述: 5.0或3.3V , 1兆位( 128千位×8 ) TIMEKEEPER NVSRAM [5.0 or 3.3V, 1 Mbit (128 Kbit x 8) TIMEKEEPER NVSRAM]
分类和应用: 存储内存集成电路静态存储器
文件页数/大小: 14 页 / 315 K
品牌: HANBIT [ HANBIT ELECTRONICS CO.,LTD ]
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HANBit  
HMNR1288D(V)  
CLOCK OPERATIONS  
The HMNR1288D(V) offers 16 internal registers which contain TIMEKEEPER, and Control data. These registers are  
memory locations which contain external (user accessible) and internal copies of the data. The external copies are  
independent of internal functions except that they are updated periodically by the simultaneous transfer of the incremented  
internal copy. TIMEKEEPER Registers store data in BCD. Control Registers store data in Binary Format.  
Setting the Alarm Clock  
Registers 1FFF6h-1FFF2h contain the alarm settings. The alarm can be configured to go off at a prescribed time on a  
specific month, date, hour, minute, or second or repeat every month, day, hour, minute, or second. It can also be  
programmed to go off while the HMNR1288D(V) is in the battery back-up to serve as a system wake-up call. Bits RPT5-  
RPT1 put the alarm in the repeat mode of operation. Table 12, page 19 shows the possible configurations. Codes not  
listed in the table default to the once per second mode to quickly alert the user of an incorrect alarm setting.  
Note: User must transition address (or toggle Chip Enable) to see Flag Bit change.  
When the clock information matches the alarm clock settings based on the match criteria defined by RPT5-RPT1, the AF  
(Alarm Flag) is set. If AFE (Alarm Flag Enable) is also set, the alarm condition activates the IRQ/FT pin. To disable alarm,  
write 0to the Alarm Date register and RPT1-5. The IRQ/FT output is cleared by a READ to the Flags Register as shown  
in Figure 6. A subsequent READ of the Flags Register is necessary to see that the value of the Alarm Flag has been reset  
to 0.’  
The IRQ/FT pin can also be activated in the battery back-up mode. The IRQ/FT will go low if an alarm occurs and both  
ABE (Alarm in Battery Back-up Mode Enable) and AFE are set. The ABE and AFE Bits are reset during power-up,  
therefore an alarm generated during power-up will only set AF. The user can read the Flag Register at system boot-up to  
determine if an alarm was generated while the HMNR1288D(V) was in the deselect mode during power-up. Figure 7,  
illustrates the back-up mode alarm timing.  
Figure 6. Alarm Interrupt Reset Waveform  
Alarm Repeat Mode  
RPT5  
Alarm Activated  
RPT4  
1
RPT3  
1
RPT2  
1
RPT1  
1
1
1
1
1
1
0
Once per Second  
Once per Minute  
Once per Hour  
Once per Day  
1
1
1
0
0
1
1
0
0
0
1
0
0
0
0
0
0
0
0
0
Once per Month  
Once per Year  
URL : www.hbe.co.kr  
Rev. 1.0 (April, 2002)  
11  
HANBit Electronics Co.,Ltd  
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