GS71116TP/J/U
AC Characteristics
Read Cycle
Parameter
Read cycle time
Address access time
Chip enable access time (CE)
Byte enable access time (UB, LB)
Output enable to output valid (OE)
Output hold from address change
Chip enable to output in low Z (CE)
Output enable to output in low Z (OE)
Byte enable to output in low Z (UB, LB)
Chip disable to output in High Z (CE)
Output disable to output in High Z (OE)
Byte disable to output in High Z (UB, LB)
* These parameters are sampled and are not 100% tested
Symbol
t
RC
t
AA
t
AC
t
AB
t
OE
t
OH
t
LZ
*
t
OLZ
*
t
BLZ
*
t
HZ
*
t
OHZ
*
t
BHZ
*
-10
Min
10
---
---
---
---
3
3
0
0
---
---
---
-12
Max
---
10
10
4
4
---
---
---
---
5
4
3.5
-15
Max
---
12
12
5
5
---
---
---
---
6
5
3.5
Min
12
---
---
---
---
3
3
0
0
---
---
---
Min
15
---
---
---
---
3
3
0
0
---
---
---
Max
---
15
15
6
6
---
---
---
---
7
6
4
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
---
Read Cycle 1: CE = OE = V
IL
, WE = V
IH
, UB and, or LB = V
IL
t
RC
Address
t
AA
t
OH
Data Out
Previous Data
Data valid
Rev: 1.06 6/2000
7/15
© 1999, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GSI [ GSI TECHNOLOGY ]
