Preliminary
GS4288C09/18/36L
Write Burst Length 2, Configuration 1
T0
T1
T2
RC = 4
T3
T4
T5
T6
T7
T8
CK
CK
CMD
ADDR
BA
WR
A
WR
A
WR
A
WR
A
WR
A
WR
A
WR
A
WR
A
WR
A
BA0
BA1
BA2
BA3
BA0
BA4
BA5
BA6
BA7
WL=5
DK
DK
DM
DQ
D0a
D0b
D1a
D1b
D2a
D2b
D3a
D3b
Write Burst Length 4, Configuration 1
T0
T1
T2
T3
T4
T5
T6
T7
T8
RC = 4
CK
CK
CMD
ADDR
BA
WR
A
NOP
WR
A
NOP
WR
NOP
WR
A
NOP
WR
A
A
BA0
BA1
BA0
BA3
BA0
WL = 5
DK
DK
DM
DQ
D0a
D0b
D0c
D0d
D1a
D1b
D1c
D1d
Rev: 1.02 3/2013
21/62
© 2011, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GSI [ GSI TECHNOLOGY ]
