Global Mixed-mode Technology Inc.
VDDQ
A voltage divider of two 50k
Ω
is connected between
VDDQ and ground, to create the internal reference
voltage (VDDQ/2). This guarantees that V
TT
will track
VDDQ/2 precisely. The optimal implementation of
VDDQ is as a remote sensing. This can be achieved
by connecting VDDQ directly to the 2.5V rail (SSTL-2
applications) at the DIMM instead of AVIN and PVIN.
This will ensure that the reference voltage tracks the
DDR memory rails precisely without a large voltage
drop from the power lines.
Vsense
The V
SENSE
pin is the feedback sensing pin of the op-
eration amplifier which regulates the V
TT
voltage. In
most motherboard applications, the termination resis-
tors will connect V
TT
in a long plane. If using the re-
mote sensing pin
–
V
SENSE
to the middle of the bus, the
significant long-trace IR drop resulting in a termination
voltage which is lower at one end than the other can
be avoided. This will provide a better distribution
across the entire termination bus. If the remote load
regulation is not used, the V
SENSE
pin must still be
connected to V
TT
for correct regulation. Care should be
taken when a long V
SENSE
trace is implemented in
close proximity to the memory. Noise pickup in the
V
SENSE
trace can cause problems with precise regula-
tion of V
TT
. A small 0.1
µ
F ceramic capacitor placed
next to the V
SENSE
pin can help to filter any high fre-
quency signals and preventing errors.
V
REF
V
REF
provides a buffered output of the internal refer-
ence voltage (VDDQ/2). It can support the reference
voltage of Northbridge chipset and memory. This out-
put remains active during the shutdown state and
thermal shutdown events to support the suspend to
RAM (STR) functionality. For better performance, us-
ing an output bypass capacitor close this pin is more
helpful for the noise. A ceramic capacitor in the range
of 0.1
µ
F to 0.01
µ
F is recommended.
V
TT
V
TT
is the regulated output that is used to terminate the
bus resistors of DDR-SDRAM. It can precisely track
the VDDQ/2 voltage with the sinking and sourcing
current capability. The G2996 is designed to deliver
1.5A continuous current and peak current up to 3A
with a fast transient response @ 2.5V supply rail. The
maximum continuous current sourcing from V
TT
is a
function of PVIN. Using a higher PVIN will increase the
source current from V
TT,
but it also increase the inter-
nal power dissipation and reduce the efficiency. Al-
though the G2996 can deliver the larger current, care
should be taken for the thermal dissipation when lar-
ger current is required. The G2996 is packaged with
Power-Pad to increase the power dissipation capability.
When driving larger current, the larger heat-sink in the
G2996
PCB is strongly recommended to have a better ther-
mal performance. The R
DS
of MOS will increase when
the junction temperature increases. If the heat is not
dealt with well, the maximum output current will be
degraded. When the temperature exceeds the junction
temperature, the thermal shutdown protection is acti-
vated. That will drive the V
TT
output into tri-state until
the temperature returns below the hysteretic trigger
point.
Capacitors
The G2996 does not require the capacitors for input
stability, but it is recommended for improving the per-
formance during large load transition to prevent the
input power rail from dropping, especially for PVIN.
The input capacitor for PVIN should be as close as
possible. The typical recommended value is 50
µ
F for
AL electrolytic capacitors, 10
µ
F with X5R for the ce-
ramic capacitors. To prevent the excessive noise cou-
pling into this device, an additional 0.1
µ
F ceramic ca-
pacitor can be placed on the AVIN power rail for the
better performance.
The output capacitor of the G2996 is suggested to use
the capacitors with low ESR. Using the capacitors with
low ESR (as ceramic, OS-CON, tantalum) will have
the better transition performance which is with smaller
voltage drop when the peak current occurring at the
transition. As a general recommendation the output
capacitor should be sized above 220
µ
F with the low
ESR for SSTL applications with DDR-SDRAM.
Thermal Dissipation
When the current is sinking to or sourcing from V
TT
,
the G2996 will generate internal power dissipation
resulting in the heat. Care should be taken to prevent
the device from damages caused by the junction tem-
perature exceeding the maximum rating. The maxi-
mum allowable internal temperature rise (T
RMAX
) can
be calculated under the given maximum ambient
temperature (T
AMAX
) of the application and the maxi-
mum allowable junction temperature (T
JMAX
).
T
RMAX
= T
JMAX
- T
AMAX
From this equation, the maximum power dissipation
(P
DMAX
) of the G2996 can be calculated:
P
DMAX
= T
RMAX
/
θ
JA
θ
JA
of the G2996 will be dependent on several vari-
ables: the packages used, the thickness and size of
the copper, the number of vias and the airflow. In the
package, the G2996 use the SOP-8 with Power-PAD
to improve the
θ
JA
. If the layout of the PCB can put a
larger size of copper to contact the Power-PAD of this
device, the
θ
JA
will be further improved. The better
θ
JA
is not only protecting the device well, but also increas-
ing the maximum current capability at the same ambi-
ent temperature.
Ver: 2.3
May 16, 2006
TEL: 886-3-5788833
http://www.gmt.com.tw
9
GMT [ GLOBAL MIXED-MODE TECHNOLOGY INC ]
