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GD25Q80CSIG 参数 Datasheet PDF下载

GD25Q80CSIG图片预览
型号: GD25Q80CSIG
PDF下载: 下载PDF文件 查看货源
内容描述: [3.3V Uniform Sector Dual and Quad Serial Flash]
分类和应用:
文件页数/大小: 56 页 / 1271 K
品牌: GILWAY [ GILWAY TECHNICAL LAMP ]
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3.3V Uniform Sector  
Dual and Quad Serial Flash  
GD25Q80C  
7.31. Enable Reset (66H) and Reset (99H)  
If the Reset command is accepted, any on-going internal operation will be terminated and the device will return to its  
default power-on state and lose all the current volatile settings, such as Volatile Status Register bits, Write Enable Latch  
status (WEL), Program/Erase Suspend status, Read Parameter setting (P7-P0), Continuous Read Mode bit setting (M7-  
M0) and Wrap Bit Setting (W6-W4).  
The “Reset (99H)” command sequence as follow: CS# goes low Sending Enable Reset command CS# goes  
high CS# goes low Sending Reset command CS# goes high. Once the Reset command is accepted by the device,  
the device will take approximately tRST_R to reset. During this period, no command will be accepted. Data corruption may  
happen if there is an on-going or suspended internal Erase or Program operation when Reset command sequence is  
accepted by the device. It is recommended to check the BUSY bit and the SUS bit in Status Register before issuing the  
Reset command sequence.  
Figure 34. Enable Reset and Reset command Sequence Diagram  
CS#  
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6 7  
SCLK  
SI  
Command  
66H  
Command  
99H  
High-Z  
SO  
7.32. Read Serial Flash Discoverable Parameter (5AH)  
The Serial Flash Discoverable Parameter (SFDP) standard provides a consistent method of describing the functional  
and feature capabilities of serial flash devices in a standard set of internal parameter tables. These parameter tables can  
be interrogated by host system software to enable adjustments needed to accommodate divergent features from multiple  
vendors. The concept is similar to the one found in the Introduction of JEDEC Standard, JESD68 on CFI. SFDP is a standard  
of JEDEC Standard No.216.  
Figure 35. Read Serial Flash Discoverable Parameter command Sequence Diagram  
CS#  
0
1
2
3
4
5
6
7
8
9 10  
28 29 30 31  
SCLK  
SI  
Command  
5AH  
24-bit address  
23 22 21  
3
2
1
0
High-Z  
SO  
CS#  
32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47  
Dummy Byte  
SCLK  
SI  
7
6
5
4
3
2
1
0
Data Out1  
Data Out2  
SO  
7
6
5
4
3
2
1
0
7
6
5
MSB  
MSB  
36  
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