欢迎访问ic37.com |
会员登录 免费注册
发布采购

GS4915 参数 Datasheet PDF下载

GS4915图片预览
型号: GS4915
PDF下载: 下载PDF文件 查看货源
内容描述: ClockCleaner ™ [ClockCleaner⑩]
分类和应用:
文件页数/大小: 26 页 / 650 K
品牌: GENNUM [ GENNUM CORPORATION ]
 浏览型号GS4915的Datasheet PDF文件第10页浏览型号GS4915的Datasheet PDF文件第11页浏览型号GS4915的Datasheet PDF文件第12页浏览型号GS4915的Datasheet PDF文件第13页浏览型号GS4915的Datasheet PDF文件第15页浏览型号GS4915的Datasheet PDF文件第16页浏览型号GS4915的Datasheet PDF文件第17页浏览型号GS4915的Datasheet PDF文件第18页  
GS4915 Data Sheet  
3.3.1 Phase Detector  
3.3.2 Charge Pump  
The GS4915's phase detector can identify phase misalignment between the  
selected input clock and the reference clock provided by the external VCO, and  
correspondingly signal the charge pump to alter the VCO control voltage.  
The charge pump block of the PLL is powered externally by +2.5V DC applied to  
CP_VDD. This is provided by the GS4915 itself at the VCO_VDD pin. An external  
RC filter at the CP_VDD pin is recommended to reduce supply noise for best jitter  
performance. Please refer to the Typical Application Circuit on page 22.  
An external resistance connected to the CP_RES pin is used to set the charge  
pump reference current of the device. Typically, the CP_RES pin will be connected  
through 10kΩ to VCO_GND.  
3.3.3 Loop Filter  
The GS4915 PLL loop filter is an external first order filter formed by a series RC  
connection as shown in Table 3-1: Loop Filter Component Values. The loop filter  
resistor value sets the bandwidth of the PLL and the capacitor value controls its  
stability and lock time. A loop filter resistor value between 1 Ω and 20 Ω and a loop  
filter capacitor value between 1µF and 33µF are recommended.  
The GS4915 uses a non-linear, bang-bang, PLL, therefore its bandwidth scales  
linearly with the input jitter amplitude - greater input jitter results in a smaller loop  
bandwidth causing more of the input jitter to be rejected. For a given input jitter  
amplitude, a smaller loop filter resistor produces a narrower loop bandwidth. With  
an input jitter amplitude of 300ps, for example, the PLL bandwidth can be adjusted  
from 2KHz to 40KHz by varying the loop filter resistor, as shown in the table below.  
For use with GS4911, a narrow loop bandwidth is recommended.  
Increasing the loop filter capacitor value increases the stability of the PLL, but  
results in a longer lock time. For loop filter resistors smaller than 7Ω, a capacitor  
value of 33µF is recommended, while larger resistor values can accommodate  
smaller capacitors. Sample combinations of the loop filter resistor and capacitor  
values are shown in the table below, along with the resulting loop bandwidth.  
Additional loop bandwidths can be achieved by using different loop filter resistor  
values.  
Table 3-1: Loop Filter Component Values  
Loop Filter  
R
Typical Loop  
Bandwidth*  
Recommended  
Loop Filter C  
Comments  
1Ω  
2kHz  
8kHz  
40kHz  
33μF  
10μF  
1μF  
Narrow bandwidth - provides maximum jitter reduction. Long lock-time.  
7Ω  
20Ω  
Note:  
Wide bandwidth. Fast lock-time.  
1. *Measured with 300ps pk-pk input jitter on CLK.  
39145 - 3 November 2007  
14 of 26