GS1574A Data Sheet
5. Application Information
5.1 PCB Layout
Special attention must be paid to component layout when designing serial digital
interfaces for HDTV. An FR-4 dielectric can be used, however, controlled
impedance transmission lines are required for PCB traces longer than
approximately 1cm. Note the following PCB artwork features used to optimize
performance:
•
•
•
•
PCB trace width for HD rate signals is closely matched to SMT component
width to minimize reflections due to change in trace impedance.
The PCB ground plane is removed under the GS1574A input components to
minimize parasitic capacitance.
The PCB ground plane is removed under the GS1574A output components to
minimize parasitic capacitance.
High speed traces are curved to minimize impedance changes.
5.2 Typical Application Circuit
CD
MUTE
VCC
VCC
14
15
16
13
10n
10n
SDI
6.2n
1
12
11
10
+
4u7
VEE_D
SDO
VEE_A
SDO
SDO
1u
1u
2
SDI
75
GS1574A
3
+
SDI
SDO
4
9
VEE_D
VEE_A
4u7
75
37R4
6
8
5
7
MCLADJ
BYPASS
470n
470n
NOTE: All resistors in Ohms, capacitors in Farads,
and inductors in Henrys, unless otherwise noted.
Figure 5-1: GS1574A Typical Application Circuit
33416 - 5 March 2006
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