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GF9101ACQQ 参数 Datasheet PDF下载

GF9101ACQQ图片预览
型号: GF9101ACQQ
PDF下载: 下载PDF文件 查看货源
内容描述: [Digital Filter, CMOS, PQFP160, PLASTIC, QFP-160]
分类和应用: LTE外围集成电路
文件页数/大小: 24 页 / 264 K
品牌: GENNUM [ GENNUM CORPORATION ]
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0XOWL
GEN
GF9101A
High Performance HD
Multirate Digital Filter
PRELIMINARY DATA SHEET
FEATURES
• drop in compatible replacement for the GF9101-CMQ
• highly optimized & flexible architecture for multi-rate
FIR filtering applications
• implements dual 12-tap filters operating at 80MHz or
single 23 or 24-tap filter operating at 40MHz maximum
data rate
• stores up to 108 sets of fully programmable 12-tap
filters with 12-bit coefficients at each tap, dynamically
addressable in each clock cycle
• 3 flexible memory loading modes
• 20-bit pipeline for cascading up to 3 devices
• 20-bit output accumulator
• filter output negate and zero controls
• supports symmetrical and asymmetrical FIR filters
• 80MHz (max) computation and input/output data rates
APPLICATIONS
Video rate conversion, high performance FIR filters, adap-
tive digital filters, video encoding, digital modulation and
MPEG pre-processing.
DESCRIPTION
The GF9101A is a drop in compatible replacement for the
GF9101. The GF9101A is a high performance HD multi-rate
digital filter which can be programmed to implement a wide
range of signal processing functions using both
symmetrical and asymmetrical filter structures. It is
composed of a 12-tap FIR filter with internal RAM to hold up
to 108 individual filter sets. An externally controlled address
bus selects one of the 108 filters in each clock cycle.
Pipelined architecture allows cascading of devices with no
additional hardware.
Two 10-bit input shift registers are provided for multiplexed
filtering applications. The 12-bit coefficients can be pro-
grammed in serial, high speed parallel or microprocessor
modes. In the high speed parallel mode, any one of the 108
filters can be reprogrammed in 18 clock cycles.
ORDERING INFORMATION
PART NUMBER
PACKAGE
TEMPERATURE
GF9101A
GF9101ACQQ
160 pin PQFP
0°C to 70°C
*
*
Forced air convection required for applications above 60 °C.
1
+10
DATA–A–IN
ENA
+10
DATA–B–OUT
ENB
SEL–A/B
ENC
COEF–ADDR
R
0
+10
DATA–A–OUT
+10
TAP TAP
CELL CELL
1
2
7
R
TAP
CELL
11
7
TAP
CELL
12
DATA
B
IN
R
R
R
Σ
±14.11
ZERO
R
4R
±13.6 TRUNCATED
NEGATE
R
DELAY
1,3,4,5
R
2
DELAY SEL
±13.6
CONFIGURATION
REGISTER
DATA B SEL
±13.6
CARRY
IN
±13.6
PIPELINE–IN
R
±13.6
0
1
±13.6
NOTE: Busses labled as ± 13.6 mean
± xxxxxxxxxxxxx.xxxxxx binary
(2's complement)
+
R
±13.6
PIPELINE–OUT
FB–SEL
R
BLOCK DIAGRAM
Revision Date: March 2001
GENNUM CORPORATION P.O. Box 489, Stn. A, Burlington, Ontario, Canada L7R 3Y3
Tel. +1 (905) 632-2996 Fax. +1 (905) 632-5946 E-mail: info@gennum.com
www.gennum.com
Document No. 522 - 15 - 02