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MB90613A 参数 Datasheet PDF下载

MB90613A图片预览
型号: MB90613A
PDF下载: 下载PDF文件 查看货源
内容描述: 16位微控制器专有 [16-bit Proprietary Microcontroller]
分类和应用: 微控制器
文件页数/大小: 91 页 / 1409 K
品牌: FUJITSU [ FUJITSU ]
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MB90610A Series  
4. 8/16-bit PPG  
This block contains the 8-bit reload timer module. The block performs PPG output in which the pulse output is  
controlled by the operation of the timer.  
The hardware consists of two 8-bit down-counters, four 8-bit reload registers, one 16-bit control register, two  
external pulse output pins, and two interrupt outputs. The PPG has the following functions.  
• 8-bit PPG output in 2-channel independent operation mode: Two independent PPG output channels are  
available.  
• 16-bit PPG output operation mode : One 16-bit PPG output channel is available.  
• 8+8-bit PPG output operation mode : Variable-period 8-bit PPG output operation is available by using the  
output of channel 0 as the clock input to channel 1.  
• PPG output operation: Outputs pulse waveforms with variable period and duty ratio.  
Can be used as a D/A converter in conjunction with an external circuit.  
(1) Register Configuration  
bit  
bit  
bit  
7
6
5
4
3
2
1
0
PPG0 operation mode  
control register  
PEN0  
POE0 PIE0 PUF0 PCM1 PCM0 Reserved  
PPGC0  
PPGC1  
Address  
: channel 0 000030H  
(R/W) (—) (R/W) (R/W) (R/W) (R/W) (R/W) (—)  
(0)  
Read/write  
Initial value  
(0)  
(0)  
(0)  
(0)  
(0)  
(0)  
(1)  
15  
14  
13  
12  
11  
10  
9
8
PPG1 operation mode  
control register  
Address: channel 1 000031H  
PEN1 PCS1 POE1 PIE1 PUF1 MD1 MD0 Reserved  
(R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (—)  
Read/write  
Initial value  
(0)  
(0)  
(0)  
(0)  
(0)  
(0)  
(0)  
(1)  
15  
14  
13  
12  
11  
10  
9
8
Reload register H  
: channel 0 000035H  
: channel 1 000037H  
Address  
PRLH0, 1  
PRLL0, 1  
(R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W)  
(X) (X) (X) (X) (X) (X) (X) (X)  
Read/write  
Initial value  
bit  
7
6
5
4
3
2
1
0
Reload register L  
: channel 0 000034H  
Address  
: channel 1 000036H  
(R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W)  
(X) (X) (X) (X) (X) (X) (X) (X)  
Read/write  
Initial value  
32  
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