MB90560/565 Series
Abbreviat-
Address ed Register
Name
Read/
Register name
Resource Name Initial Value
Write
00004DH
00004EH
00004FH
000050H
000051H
000052H
000053H
000054H
000055H
000056H
000057H
000058H
000059H
00005AH
00005BH
00005CH
00005DH
00005EH
00005FH
000060H
000061H
000062H
000063H
000064H
000065H
000066H
000067H
000068H
000069H
00006AH
PPGC5
PCS45
PPG control register ch5 (upper)
PPG clock control register ch4, ch5
R/W
R/W
0 0 0 0 0 0 0 1B
0 0 0 0 0 0 XXB
8/16-bit PPG timer
Access prohibited
TMRR0
DTCR0
TMRR1
DTCR1
TMRR2
DTCR2
SIGCR
8-bit reload register ch0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
XXXXXXXXB
0 0 0 0 0 0 0 0B
XXXXXXXXB
0 0 0 0 0 0 0 0B
XXXXXXXXB
0 0 0 0 0 0 0 0B
0 0 0 0 0 0 0 0B
8-bit timer control register ch0
8-bit reload register ch1
Waveform
generator
8-bit timer control register ch1
8-bit reload register ch2
8-bit timer control register ch2
Waveform control register
Access prohibited
Compare clear register (lower)
Compare clear register (upper)
Timer data register (lower)
R/W
R/W
R/W
R/W
R/W
R/W
XXXXXXXXB
XXXXXXXXB
0 0 0 0 0 0 0 0B
0 0 0 0 0 0 0 0B
0 0 0 0 0 0 0 0B
0 XX 0 0 0 0 0B
CPCLR
TCDT
TCCS
16-bit freerun
timer
Timer data register (upper)
Timer control/status register (lower)
Timer control/status register (upper)
Access prohibited
Input capture data register ch0 (lower)
Input capture data register ch0 (upper)
Input capture data register ch1 (lower)
Input capture data register ch1 (upper)
Input capture data register ch2 (lower)
Input capture data register ch2 (upper)
Input capture data register ch3 (lower)
Input capture data register ch3 (upper)
Input capture control register 01
R
R
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
0 0 0 0 0 0 0 0B
IPCP0
IPCP1
IPCP2
R
R
R
Input capture
R
R
IPCP3
ICS01
R
R/W
Access prohibited
ICS23
Input capture control register 23
R/W
Input capture
0 0 0 0 0 0 0 0B
(Continued)
00006BH
to
00006EH
Access prohibited
23
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