MB90560/565 Series
■ I/O MAP
Abbreviat-
Address ed Register
Name
Read/
Register name
Port 0 data register
Resource Name Initial Value
Write
000000H
000001H
000002H
000003H
000004H
000005H
000006H
PDR0
PDR1
PDR2
PDR3
PDR4
PDR5
PDR6
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Port 0
Port 1
Port 2
Port 3
Port 4
Port 5
Port 6
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
Port 1 data register
Port 2 data register
Port 3 data register
Port 4 data register
Port 5 data register
Port 6 data register
000007H
to
Access prohibited
00000FH
000010H
000011H
000012H
000013H
000014H
000015H
000016H
DDR0
DDR1
DDR2
DDR3
DDR4
DDR5
DDR6
Port 0 direction register
Port 1 direction register
Port 2 direction register
Port 3 direction register
Port 4 direction register
Port 5 direction register
Port 6 direction register
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Port 0
Port 1
Port 2
Port 3
Port 4
Port 5
Port 6
0 0 0 0 0 0 0 0B
0 0 0 0 0 0 0 0B
0 0 0 0 0 0 0 0B
0 0 0 0 0 0 0 0B
X 0 0 0 0 0 0 0B
0 0 0 0 0 0 0 0B
XXXX 0 0 0 0B
Port 5,
A/D converter
000017H
ADER
Analog input enable register
R/W
1 1 1 1 1 1 1 1B
000018H
to
Access prohibited
00001FH
000020H
000021H
SMR0
SCR0
SIDR0
SODR0
SSR0
Mode register ch0
R/W
W, R/W
R
0 0 0 0 0 X 0 0B
0 0 0 0 0 1 0 0B
Control register ch0
Input data register ch0
Output data register ch0
Status register ch0
Mode register ch1
UART0
UART1
000022H
XXXXXXXXB
W
000023H
000024H
000025H
R, R/W
R/W
W, R/W
R
0 0 0 0 1 0 0 0B
0 0 0 0 0 X 0 0B
0 0 0 0 0 1 0 0B
SMR1
SCR1
SIDR1
SODR1
SSR1
Control register ch1
Input data register ch1
Output data register ch1
Status register ch1
000026H
XXXXXXXXB
W
000027H
000028H
R, R/W
0 0 0 0 1 0 0 0B
Access prohibited
Communication prescaler
control register ch0
Communication
prescaler
000029H
CDCR0
R/W
0 XXX 0 0 0 0B
(Continued)
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