MB90480/485 Series
(6) Bus Write Timing
(VCC = 2.7 V to 3.6 V, VSS = 0.0 V, TA = 0 °C to +70 °C)
Value
Condi-
tion
Sym-
bol
Parameter
Pin name
Unit
Remarks
Min
Max
Valid address→WR↓time
tAVWL Address, WR
⎯
⎯
tCP* − 15
⎯
ns
ns
16 MHz < fCP ≤
3 tCP* / 2 − 25
⎯
25 MHz
WR pulse width
tWLWH
WRL, WRH
Data, WR
8 MHz < fCP ≤
16 MHz
3 tCP* / 2 − 20
3 tCP* / 2 − 15
10
⎯
⎯
⎯
⎯
⎯
⎯
ns
ns
ns
Valid data output →WR↑time tDVWH
16 MHz < fCP ≤
25 MHz
WR,
Data
8 MHz < fCP ≤
16 MHz
WR↑→data hold time
tWHDX
⎯
20
⎯
ns
fCP ≤ 8 MHz
⎯
⎯
⎯
⎯
30
⎯
⎯
⎯
⎯
ns
ns
ns
ns
WR↑→address valid time
WR↑→ALE↑time
tWHAX WR, Address
tCP* / 2 − 10
tCP* / 2 − 15
tCP* / 2 − 17
tWHLH
tWLCH
WR, ALE
WR, CLK
WR↓→CLK↑time
* : tCP is internal operating clock cycle time. Refer to “ (1) Clock Timing”.
97
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