MB90480/485 Series
(5) Bus Read Timing
Parameter
(VCC = 2.7 V to 3.6 V, VSS = 0.0 V, TA = 0 °C to +70 °C)
Value
Symbol Pin name Conditions
Unit
Remarks
Min
Max
16 MHz < fCP ≤
tCP* / 2 − 15
⎯
ns
ns
25 MHz
8 MHz < fCP ≤
16 MHz
ALE pulse width
tLHLL
ALE
⎯
⎯
tCP* / 2 − 20
⎯
fCP ≤ 8 MHz
tCP* / 2 − 35
tCP* / 2 − 17
tCP* / 2 − 40
⎯
⎯
⎯
ns
ns
ns
Valid address→
ALE↓time
Address,
ALE
tAVLL
fCP ≤ 8 MHz
ALE↓→
ALE,
Address
tLLAX
⎯
⎯
tCP* / 2 − 15
tCP* − 25
⎯
⎯
ns
ns
address valid time
Valid address→
RD↓time
RD,
address
tAVRL
⎯
⎯
5 tCP* / 2 − 55
5 tCP* / 2 − 80
ns
ns
Valid address→
Address,
Data
tAVDV
tRLRH
tRLDV
⎯
⎯
⎯
valid data input
fCP ≤ 8 MHz
16 MHz < fCP ≤
25 MHz
3 tCP* / 2 − 25
3 tCP* / 2 − 20
⎯
⎯
ns
ns
RD pulse width
RD
8 MHz < fCP ≤
16 MHz
3 tCP* / 2 − 55
3 tCP* / 2 − 80
⎯
⎯
ns
ns
RD↓→
valid data input
RD,
Data
fCP ≤ 8 MHz
RD,
Data
RD↑→data hold time
RD↑→ALE↑time
tRHDX
tRHLH
tRHAX
⎯
⎯
⎯
0
⎯
⎯
⎯
ns
ns
ns
RD, ALE
tCP* / 2 − 15
tCP* / 2 − 10
RD↑→
address valid time
Address,
RD
Valid address→
CLK↑time
Address,
CLK
tAVCH
⎯
tCP* / 2 − 17
⎯
ns
RD↓→CLK↑time
ALE↓→RD↓time
tRLCH
tLLRL
RD, CLK
RD, ALE
⎯
⎯
tCP* / 2 − 17
tCP* / 2 − 15
⎯
⎯
ns
ns
* : tCP is internal operating clock cycle time. Refer to “ (1) Clock Timing”.
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