MB90480/485 Series
Abbreviated
register
name
Read/
Write
Address
Register name
Resource name
Initial value
62H
63H
64H
65H
66H
67H
68H
69H
6AH
6BH
Timer counter data register lower digits
Timer counter data register upper digits
Timer control status register
TCDT
TCDT
TCCS
TCCS
R/W
R/W
R/W
R/W
00000000B
00000000B
00000000B
0--00000B
16-bit input/output
timer free run timer
Timer control status register
Compare clear register lower digits
Compare clear register upper digits
Up/down count register (ch.0)
Up/down count register (ch.1)
Reload/compare register (ch.0)
Reload/compare register (ch.1)
Counter control register (ch.0)
lower digits
Counter control register (ch.0)
upper digits
XXXXXXXXB
XXXXXXXXB
00000000B
00000000B
00000000B
00000000B
CPCLR
R/W
UDCR0
UDCR1
RCR0
R
R
W
W
RCR1
8/16-bit up/down
6CH
CCRL0
CCRH0
W, R/W
R/W
0X00X000B
00000000B
6DH
6EH
6FH
(Reserved area)
ROM mirroring
function
ROM mirror function select register
ROMM
CCRL1
R/W
------+1B
Counter control register (ch.1)
lower digits
Counter control register (ch.1)
upper digits
70H
71H
W, R/W
0X00X000B
8/16-bit up/down
CCRH1
CSR0
R/W
-0000000B
00000000B
72H
73H
Counter status register (ch.0)
R, R/W
(Reserved area)
74H
Counter status register (ch.1)
CSR1
(Reserved area)
R, R/W
8/16-bit UDC
PWC (ch.0)
00000000B
75H
76H*
77H*
78H*
79H*
7AH*
7BH*
7CH*
7DH*
7EH*
7FH*
80H*
81H*
82H*
83H
00000000B
0000000XB
00000000B
00000000B
00000000B
0000000XB
00000000B
00000000B
00000000B
0000000XB
00000000B
00000000B
------00B
PWC control/status register
PWC data buffer register
PWC control/status register
PWC data buffer register
PWC control/status register
PWCSR0 R, R/W
PWCR0
PWCSR1 R, R/W
PWCR1 R/W
PWCSR2 R, R/W
R/W
PWC (ch.1)
PWC (ch.2)
PWC data buffer register
PWCR2
DIVR0
(Reserved area)
DIVR1
(Reserved area)
DIVR2
(Reserved area)
R/W
R/W
Dividing ratio control register
PWC (ch.0)
PWC (ch.1)
PWC (ch.2)
84H*
85H
Dividing ratio control register
Dividing ratio control register
R/W
------00B
------00B
86H*
87H
R/W
(Continued)
27
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