MB90480/485 Series
Abbre-
viated
register
name
Read/
Write
Address
Register name
Resource name Initial value
44H
45H
46H
47H
48H
49H
4AH
4BH
4CH
4DH
4EH
4FH
50H
51H
52H
53H
54H
55H
56H
57H
58H
59H
5AH
5BH
PPG4, PPG5 output control register
PPG45
(Reserved area)
R/W
8/16-bit PPG
00000000B
ADCS1
R/W
00000000B
00000000B
XXXXXXXXB
00000XXXB
00000000B
00000000B
00000000B
00000000B
00000000B
00000000B
00000000B
00000000B
00000000B
00000000B
00000000B
00000000B
0000--00B
---00000B
Control status register
Data register
ADCS2 W, R/W
A/D converter
ADCR1
ADCR2
R
W, R
Output compare register (ch.0) lower digits
Output compare register (ch.0) upper digits
Output compare register (ch.1) lower digits
Output compare register (ch.1) upper digits
Output compare register (ch.2) lower digits
Output compare register (ch.2) upper digits
Output compare register (ch.3) lower digits
Output compare register (ch.3) upper digits
Output compare register (ch.4) lower digits
Output compare register (ch.4) upper digits
Output compare register (ch.5) lower digits
Output compare register (ch.5) upper digits
Output control register (ch.0)
OCCP0
OCCP1
OCCP2
OCCP3
OCCP4
OCCP5
R/W
R/W
R/W
R/W
R/W
R/W
16-bit
input/output
timer output
compare
(ch.0 to ch.5)
OCS0
OCS1
OCS2
OCS3
OCS4
OCS5
R/W
R/W
R/W
R/W
R/W
R/W
Output control register (ch.1)
Output control register (ch.2)
0000--00B
---00000B
Output control register (ch.3)
Output control register (ch.4)
0000--00B
---00000B
Output control register (ch.5)
Input capture data register (ch.0) lower
digits
5CH
5DH
5EH
5FH
R
R
R
XXXXXXXXB
XXXXXXXXB
XXXXXXXXB
IPCP0
Input capture data register (ch.0) upper
digits
16-bit
input/output
timer input
capture
Input capture data register (ch.1) lower
digits
IPCP1
ICS01
(ch.0, ch.1)
Input capture data register (ch.1) upper
digits
R
XXXXXXXXB
00000000B
60H
61H
Input capture control status register
R/W
(Reserved area)
(Continued)
26
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