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MB85RC64 参数 Datasheet PDF下载

MB85RC64图片预览
型号: MB85RC64
PDF下载: 下载PDF文件 查看货源
内容描述: FRAM内存64 K(为8K ×8 )位I2C [Memory FRAM 64 K (8 K x 8) Bit I2C]
分类和应用:
文件页数/大小: 20 页 / 137 K
品牌: FUJITSU [ FUJITSU ]
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MB85RC64  
BLOCK DIAGRAM  
Serial/Parallel Converter  
SDA  
FRAM Array  
8,192 × 8  
SCL  
WP  
Column Decoder/Sense Amp/  
Write Amp  
A0, A1, A2  
I2C (Inter-Integrated Circuit)  
The MB85RC64 has the two-wire serial interface; the I2C bus,and operates as a slave device.  
The I2C bus defines communication roles of “master” and “slave” devices, with the master side holding the  
authority to initiate control. Furthermore, a I2C bus connection is possible where a single master device is  
connected to multiple slave devices in a party-line configuration. In this case, it is necessary to assign a  
unique device address to the slave device.  
I2C Interface System Configuration Example  
VDD  
Pull-up  
Resistors  
SCL  
SDA  
I2C Bus  
MB85RC64  
I2C Bus  
MB85RC64  
I2C Bus  
MB85RC64  
I2C Bus  
Master  
...  
A2 A1 A0  
A2 A1 A0  
A2 A1 A0  
0
0
0
0
0
1
0
1
0
Device address  
DS05–13109–3E  
3
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