MB15F72SP
• Prescaler Data Setting (SW)
Divide ratio
SW = “1”
8/9
SW = “0”
16/17
Prescaler divide ratio IF-PLL
Prescaler divide ratio RF-PLL
64/65
128/129
• Charge Pump CurrentSetting (CS)
• LD/fout Output Select Data Setting (LDS)
Current value
±6.0 mA
CS
1
LD/fout output signal
fout signal
LDS
1
0
±1.5 mA
0
LD signal
• Test Purpose Bit Setting (T1, T2)
LD/fout pin state
Outputs frIF.
T1
T2
0
0
Outputs frRF.
Outputs fpIF.
Outputs fpRF.
1
0
1
0
1
1
• Phase Comparator Phase Switching Data Setting (FCIF, FCRF)
FCIF = “1” FCRF = “1” FCIF = “0” FCRF = “0”
Phase comparator input
DoIF
DoRF
DoIF
DoRF
fr > fp
fr < fp
H
L
L
H
Z
fr = fp
Z
Z : High-impedance
Depending upon the VCO and LPF polarity, FC bit should be set.
High
(1)
(1) VCO polarity FC = “1”
(2) VCO polarity FC = “0”
VCO Output
Frequency
(2)
Max.
LPF Output voltage
Note : Give attention to the polarity for using active type LPF.
10
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