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MB15C03 参数 Datasheet PDF下载

MB15C03图片预览
型号: MB15C03
PDF下载: 下载PDF文件 查看货源
内容描述: 单串行输入锁相环频率合成器的片上预分频器 [Single Serial Input PLL Frequency Synthesizer On-Chip prescaler]
分类和应用: 预分频器
文件页数/大小: 24 页 / 258 K
品牌: FUJITSU [ FUJITSU ]
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MB15C03  
FUNCTIONAL DESCRIPTIONS  
1. Pulse Swallow Function  
The divide ratio can be calculated using the following equation:  
fVCO = [(M x N) + A] x fOSC ÷ R (A < N)  
fVCO : Output frequency of external voltage controlled oscillator (VCO)  
N
A
: Preset divide ratio of binary 12-bit programmable counter (5 to 4,095)  
: Preset divide ratio of binary 6-bit swallow counter (0 to 63)  
fOSC : Output frequency of the reference frequency oscillator  
R
M
: Preset divide ratio of binary 14-bit programmable reference counter (5 to 16,383)  
: Preset modulus of dual modulus prescaler (64)  
2. Circuit Description  
(1) Intermittent operation  
The intermittent operation of the MB15C03 refers to the process of activating and deactivating its internal circuit  
thus saving power dissipation otherwise consumed by the circuit. If the circuit is simply restarted from the power  
saving state, however, the phase relation between the reference frequency (fr) and the programmable frequency  
(fp), which are the input to the phase comparator, is not stable even when they are of the same value. This may  
cause the phase comparator to generate an excessively large error signal, resulting in an out-of-synth lock  
frequency.  
To preclude the occurrence of this problem, the MB15C03 has an intermittent mode control circuit which forces  
the frequencies into phase with each other when the IC is reactivated, thus minimizing the error signal and  
resultant lock frequency fluctuations. The intermittent mode control circuit is controlled by the PS pin. Setting  
pin PS high provides the normal operation mode and setting the pin low provides the power saving mode. The  
MB15C03 behavior in the active and power saving modes is summarized below.  
Active mode (PS = “H”)  
All MB15C03 circuits are active and provide the normal operation.  
Power saving mode (PS = “L”)  
The MB15C03 stops any circuits that consume power heavily as well as cause little inconvenience when  
deactivated and enters the low-power dissipation state. DO and LD pins take the same state as when the PLL  
is locked. DO pin becomes a high-impedance state.  
Applying the intermittent operation by alternating the active and power saving modes, and also forcing the phases  
of fr and fp to synchronize when it switches from stand by to active modes, the MB15C03 can keep the power  
dissipation of its entire circuitry to the minimum.  
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