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MB15C03 参数 Datasheet PDF下载

MB15C03图片预览
型号: MB15C03
PDF下载: 下载PDF文件 查看货源
内容描述: 单串行输入锁相环频率合成器的片上预分频器 [Single Serial Input PLL Frequency Synthesizer On-Chip prescaler]
分类和应用: 预分频器
文件页数/大小: 24 页 / 258 K
品牌: FUJITSU [ FUJITSU ]
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MB15C03  
3. Setting the Divide Ratio  
(1) Serial data format  
The format of the serial data is shown is Figure 3. The serial data is composed of control bits and divide ratio  
setting data. The contorl bits select the programmable divider or programmable reference divider.  
In case of the programmable divider, serial data consists of 18 bits (6 bits for the swallow counter and 12 bits  
for the programmable counter) and control bits as shown in Figure 3.1. In case of the programmable reference  
divider, the serial data consists of 14 bits and 2 control bits as shown in Figure 3.2.  
The control bits are set to:  
C0 = C1= 0  
for the programmable divider  
C0 = 0, C1 = 1  
for the programmable reference divider.  
Figure 3 Serial data format  
MSB  
LSB  
Direction of data input  
C
0
(=0)  
C
1
(=0)  
A
0
A
1
A
2
A
3
A
4
A
5
N
0
N
1
N
2
N
3
N
4
N
5
N
6
N
7
N
8
N
9
N
N
10 11  
Swallow counter  
Programmable counter  
Control bit  
Figure 3.1 Divide ratio for the programmable divider  
LSB  
MSB  
Direction of data input  
C
0
(=0)  
C
1
(=1)  
R
0
R
1
R
2
R
3
R
4
R
5
R
6
R
7
R
8
R
9
R
R
R
R
10 11 12 13  
Programmable reference counter  
Control bit  
Figure 3.2 Divide ratio for the programmable reference divider  
(2) The flow of serial data  
Serial data is received via data pin in synchronization with the clock input and loaded into shift register which  
contains the divide ratio setting data and into the control register which contains the control bit. The logical  
product (through the AND gate in Figure 4) of LE and the control register output (i.e., control bit) is fed to the  
enable input of the latches. Accordingly, when LE is set high, the latch for the divider identitied by the control bit  
is enabled and the divide ratio data from the shift register is loaded into the selected counter(s).  
11