MB15C03
(4) Setting the divide ratio for the programmable reference divider
Columns R0-R13 of Table 3 represent the divide ratio of the programmable reference counter. The control bit is
set to 1.
Table.3 Divide ratio for the programmable reference divider
Divide
R
0
R
1
R
2
R
3
R
4
R
5
R
6
R
7
R
8
R
9
R
R
11
R
12
R
13
ratio
(R)
10
5
1
0
•
0
1
•
1
1
•
0
0
•
0
0
•
0
0
•
0
0
•
0
0
•
0
0
•
0
0
•
0
0
•
0
0
•
0
0
•
0
0
•
6
•
16383
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Note: Less than 5 is prohibited.
(5) Setting data input timing
TheMB15C03uses20bitsofserialdatafortheprogrammabledividerand16bitsfortheprogrammablereference
divider. When more bits of serial data than defined for the target divider are received, only the last valid serial
data bits are effective.
To set the divide ratio for the MB15C03 dividers, it is necessary to supply the Data, Clock, and LE signals at the
timing shown in Figure 5.
t1 (≥ 0.5 µs): Data setup time
t2 (≥ 0 5 µs): Data hold time
t3 (≥ 0.5 µs): Clock pulse width
t5 (≥ 0.5 µs): LE pulse width
t4 (≥ 0.5 µs): LE setup time to the rising edge of last clock
13
FUJITSU [ FUJITSU ]
