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F126NB 参数 Datasheet PDF下载

F126NB图片预览
型号: F126NB
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器 [8-bit Microcontrollers]
分类和应用: 微控制器
文件页数/大小: 80 页 / 1518 K
品牌: FUJITSU [ FUJITSU ]
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MB95120MB Series  
(8) I2C Timing  
(VCC = 5.0 V 10%, AVSS = VSS = 0.0 V, TA = − 40 °C to + 105 °C)  
Value  
Condition Standard-mode  
Pin  
name  
Parameter  
Symbol  
Fast-mode  
Unit  
Min  
Max  
Min  
Max  
SCL clock frequency  
fSCL  
SCL0  
0
100  
0
400  
kHz  
(Repeat) Start condition hold time  
SDA ↓ → SCL ↓  
SCL0  
SDA0  
tHD;STA  
4.0  
0.6  
μs  
SCL clock “L” width  
SCL clock “H” width  
tLOW  
tHIGH  
SCL0  
SCL0  
4.7  
4.0  
1.3  
0.6  
μs  
μs  
(Repeat) Start condition setup time  
SCL ↑ → SDA ↓  
SCL0  
SDA0  
tSU;STA  
tHD;DAT  
4.7  
0
3.45*2  
0.6  
0
0.9*3  
μs  
μs  
μs  
μs  
μs  
R = 1.7 kΩ,  
C = 50 pF*1  
SCL0  
SDA0  
Data hold time SCL ↓ → SDA ↓ ↑  
SCL0  
SDA0  
Data setup time SDA ↓ ↑ → SCL tSU;DAT  
0.25*4  
4.0  
0.1*4  
0.6  
1.3  
Stop condition setup time SCL ↑ →  
SDA ↑  
SCL0  
SDA0  
tSU;STO  
Bus free time between stop  
tBUF  
SCL0  
SDA0  
4.7  
condition and start condition  
*1 : R, C : Pull-up resistor and load capacitor of the SCL and SDA lines.  
*2 : The maximum tHD;DAT have only to be met if the device dose not stretch the “L” width (tLOW) of the SCL signal.  
*3 : A fast-mode I2C-bus device can be used in a standard-mode I2C-bus system, but the requirement  
tSU;DAT 250 ns must then be met.  
*4 : Refer to “ Note of SDA and SCL set-up time”.  
Note of SDA and SCL set-up time  
SDA0  
Input data set-up time  
SCL0  
6 tcp  
Note : The rating of the input data set-up time in the device connected to the bus cannot be satisfied depending on  
the load capacitance or pull-up resistor.  
Be sure to adjust the pull-up resistor of SDA and SCL if the rating of the input data set-up time cannot be  
satisfied.  
57  
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