July 1997
Revision 1.0
EOB2UV6482B-60TG-S
Ordering Information
E O B 2 U V 64 82 B
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9) (10)
(1)
Memory Type
F : Fast Page Mode (FPM)
E : Extended Data Out (EDO)
Module Shape
S : SIMM
D : DIMM
O : Small Outline DIMM
Module Pin Count
A : 72-pin
B : 144-pin
C : 168-pin
D : 200-pin
Word Depth
1 : 1M
2 : 2M
4 : 4M, etc.
Buffer Type
B : Buffered
U : Unbuffered
R : Registered
Operating Voltage
N : 5V
V : 3,3V
Data Width
(ex. 8=x8, 32=x32, 72=x72 etc.)
Device Configuration / Refresh
41 : 1Mx4, 1K Refresh Cycle
42 : 4Mx4, 2K Refresh Cycle
44 : 4Mx4, 4K Refresh Cycle
82 : 2Mx8, 2K Refresh Cycle
14 : 1Mx16, 4K Refresh Cycle
11 : 1Mx16, 1K Refresh Cycle
- 60 T G -
(11)
(12) (13)
(9)
Module Revision *1
Blank : Rev. 0
A
: Rev. 1
B
: Rev. 2 (etc.)
S
(14) (15)
(2)
*1 When DRAM device or PCB is
revised, the revision is changed
(10)
Power consumption
Blank : Standard
L
: Low Power
(11)
Speed
50
:
60
:
70
:
50ns
60ns
70ns
(3)
(4)
(12)
Package of Component
J
: SOJ
T
: TSOP
(13)
Module Lead Finish
S
: Solder Plate
G
: Gold Plate
(14)
Private Brand Name *2
Blank : Common Products
G
: FMG Brand
*2 This column is applicable to
custom modules, NOT applicable
to JEDEC standard commodity
products
(15)
Assembly & Test Site
S
: Smart Modular Technologies
(5)
(6)
(7)
(8)
Fujitsu Microelectronics, Inc./Fujitsu Mikroelektronik GmbH
7
FUJITSU [ FUJITSU COMPONENT LIMITED. ]
