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VNC2-48Q1B-TRAY 参数 Datasheet PDF下载

VNC2-48Q1B-TRAY图片预览
型号: VNC2-48Q1B-TRAY
PDF下载: 下载PDF文件 查看货源
内容描述: [Vinculum-II Embedded Dual USB Host Controller IC]
分类和应用:
文件页数/大小: 88 页 / 2234 K
品牌: FTDI [ FUTURE TECHNOLOGY DEVICES INTERNATIONAL LTD. ]
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Datasheet  
Vinculum-II Embedded Dual USB Host Controller IC  
Version 1.7  
Document No.: FT_000138 Clearance No.: FTDI#143  
64 Pin  
Package  
48 Pin  
Package  
32 Pin  
Package  
Name  
Type  
Description  
Available Available Available  
pins  
pins  
pins  
12, 16,  
20, 25,  
29, 40,  
44, 48,  
52, 58,  
62  
12,16,  
21, 32,  
36, 42,  
46  
When high, do not write data into the FIFO.  
12, 24,  
30  
fifo_txe#  
Output  
When low, data can be writteninto the FIFO  
by strobing fifo_wr# high, thenlow.  
13, 17,  
22, 26,  
31, 41,  
45, 49,  
55, 59,  
63  
Enables the current FIFO data byte on  
D0...D7 when low. Fetchesthe next FIFO  
data byte (if available) from the receive  
FIFO buffer when fifo_rd#goesfromhigh to  
low  
13, 18,  
22, 33,  
37, 43,  
47  
14, 25,  
31  
fifo_rd#  
Input  
14, 18,  
23, 27,  
32, 42,  
46, 50,  
56, 60,  
64  
14, 19,  
23, 34,  
38, 44,  
48  
Writes the data byte on the D0...D7pins  
into the transmit FIFO buffer when fifo_wr#  
goes from high to low.  
15, 26,  
32  
fifo_wr#  
Input  
Table 6.16 Data and Control Bus Signal Mode Options - Parallel FIFO Interface  
6.6.2 Read / Write Transaction Asynchronous FIFO Mode  
When in Asynchronous FIFO interface mode, the timing of read and write operations on the FIFO  
interface are shownin Figure 6.22 and Table 6.17.  
In asynchronous mode an external device can control data transfer driving FIFO_WR# and FIFO_RD#  
inputs. In contrast to synchronous mode, in asynchronous mode the 245 FIFO module generates the  
output enable EN# signal. EN# signal is effectively the read signal RD#.  
Current byte is available to be read when FIFO_RD# goes low. When FIFO_RD# goes high, FIFO_RXF#  
output will also go high. It will only become low again when there is another byte to read.  
When FIFO_WR# goes low FIFO_TXE# flag will always go high. FIFO_TXE# goes low again only when  
there is still space for data to be written in to the module.  
59  
Copyright © Future Technology Devices International Limited  
 
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