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Document Reference No.: FT_000198
MORPH-IC-II Datasheet
Version 1.02
Clearance No.: FTDI#
164
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MorphIO-II – An Application Software
MorphIO-II is an easy to use utility used for displaying and setting the binary levels and port direction of
all Morph-IC-II‟s 80 I/Os. A screen shot demonstrating how the IO are set is given in Fig. 10. This
diagram shows MorphIO-II with some voltage levels set to different values. An illustration of J1-19 being
set to low and J1-15 being set to high is also shown here. It is also illustrated that only these two pins
are set as outputs the remaining pins are set as inputs. To set the level of a pin it is required to be
defined as an output.
The defined settings for a pin are illustrated in MorphIO-II‟s GUI using a check box. These check boxes
are located in one of the following columns I, O, H and L.
Check boxes in the I columns set a pin to be an input. Check boxes in the O columns set a pin to be an
output. Check boxes in the H columns set output pins to be high. Check boxes in the L columns set
output pins to be low.
It is also demonstrated in Fig. 11 pin J1-19 being set to a logic low thus inducing a logic low reading on
this pin, all other levels read are logic highs. This is indicated by a green and red “light” around the level
select check box which is used to display a logic level read of the pin, a green light indicates a low and
red light indicates a high. In this demonstration J1-15 is set to output logic high, and it reads back logic
high, while all other pins except pin J1-19 are reading logic high and are set to be inputs. All input pins
are reading a logic high by default, this is because the I/Os of the Cyclone-II have a weak pull-up
embedded in the FPGA.
A screen shot of the entire MorphIO-II is illustrated in Fig. 11, all 80 I/O controls and clock enables are
controlled through this GUI. A load and save configuration control is also displayed in this diagram; these
controls are for controlling the feature used to save and load the settings all the controls of the MorphIO-
II.
MorphIO-II can also be used to apply a clock signal to the dedicated clock pins of the FPGA, these
dedicated clock pins are displayed on MorphIO-II‟s GUI with a clock button next to the IO control panel.
The frequency of the applied clock signal can range from 12.3KHz to 50MHz. An illustration of how to set
the clock frequency is given in Fig. 12. The frequency is selected by navigating through the Setup tab,
selecting the pin being toggled and selecting the required clock frequency.
In MorphIO-II‟s GUI, the I/O control blocks of I/O Bank 4 are colour coded dark gray to indicate that
these I/Os can transfer signals with
logic voltage levels
other than 3.3V. In order to process these
signals, two changes are necessary.
The first change is to set the Quartus-II files used to configure MorphIO-II‟s application to deal with these
new I/O settings which are intended to be processed on I/O Bank4. This task is carried out by changing
the I/O Standards specified in the I/O pin map for all ports in I/O Bank4 to be set to the IO Standard of
the intended signal being processed via I/O Bank4. Then compile the new design and paste the newly
generated *.RBF file to the directory of MorphIO-II making sure the name is “morphio50m_Mii”
(MorphIO-II is hardcoded to read a *.RBF file with the name “morphio50m_Mii” from its stored
directory).
The second change is to reconfigure the hardware to supply the correct voltage to I/O Bank4, this is done
by opening jumper VBank4 to remove the short to 3.3V, and then applying power with the voltage set to
the same voltage as logic high of the used logic standard.
Fig. 10 – MorphIO-II Settings
Copyright © 2010 Future Technology Devices International Limited
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