Datasheet
Vinculum-II Embedded Dual USB Host Controller IC
Version 1.7
Document No.: FT_000138 Clearance No.: FTDI#143
Appendix B – List of Figures and Tables
List of Tables
Table 1.1 Part Numbers..........................................................................................................................2
Table 3.1 USB Interface Group.............................................................................................................16
Table 3.2 Power and Ground.................................................................................................................16
Table 3.3 Miscellaneous Signal Group...................................................................................................17
Table 3.4 Default I/O Configuration......................................................................................................20
Table 4.1 - Peripheral Pin Requirements ...............................................................................................22
Table 5.1 I/O Peripherals Signal Names...............................................................................................29
Table 5.2 Group 0 ................................................................................................................................31
Table 5.3 Group 1 ................................................................................................................................32
Table 5.4 Group 2................................................................................................................................33
Table 5.5 Group 3 ................................................................................................................................34
Table 6.1 Data and Control Bus Signal Mode Options – UART Interface .................................................38
Table 6.2 SPI Signal Names..................................................................................................................39
Table 6.3 - SPI Slave Speeds................................................................................................................40
Table 6.4 - Clock Phase/Polarity Modes.................................................................................................40
Table 6.5 Data and Control Bus Signal Mode Options - SPI Slave Interface...........................................42
Table 6.6 SPI Command and Status Fields............................................................................................44
Table 6.7 SPI Command and Status Fields............................................................................................49
Table 6.8 SPI Setup Bit Encoding..........................................................................................................49
Table 6.9 SPI Slave Data Timing...........................................................................................................50
Table 6.10 SPI Master Data Read Status Bit..........................................................................................51
Table 6.11 SPI Master Data Write Status Bit.........................................................................................51
Table 6.12 SPI Status Read Byte – bit descriptions...............................................................................52
Table 6.13 SPI Master Signal Names.....................................................................................................54
Table 6.14 SPI Master Timing ...............................................................................................................55
Table 6.15 Debugger Signal Name.......................................................................................................56
Table 6.16 Data and Control Bus Signal Mode Options - Parallel FIFO Interface.....................................59
Table 6.17 Asynchronous FIFO mode Read / Write Timing.....................................................................60
Table 6.18 Synchronous FIFO control signals........................................................................................61
Table 6.19 Synchronous FIFO mode Read / Write Timing ......................................................................63
Table 9.1 Absolute Maximum Ratings ...................................................................................................68
Table 9.2 Operating Voltage and Current..............................................................................................69
Table 9.3 I/O Pin Characteristics...........................................................................................................69
Table 9.4 USB I/O Pin (USBDP, USBDM) Characteristics........................................................................70
Table 9.5 Crystal Oscillator 1.8 Volts DC Characteristics........................................................................70
Table 9.6 ESD and Latch-up Specifications............................................................................................71
Table 11.1 Reflow Profile Parameter Values ..........................................................................................81
Table 11.2 Package Reflow Peak Temperature ......................................................................................81
List of Figures
85
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