Datasheet
Vinculum-II Embedded Dual USB Host Controller IC
Version 1.7
Document No.: FT_000138 Clearance No.: FTDI#143
6.3.6 VNC1L Legacy Interface
VNC2 SPI is compatible with the SPI slave of VNC1L. This is a custom protocol using 4 wires and will be
explained here.
The Master asserts the slave select, but in this case it is an active high signal. Following this, a 3 bit
command is sent on the MOSI pin (see Figure 6.15 for command structure). This has instructions on
whether a read or write is requested and if data or status is to be sent. For a data write, 8 bits of data
are sent on MOSI followed by a status bit being returned on MISO. If this bit is ‘0’ it means the data write
was successful. If it is ‘1’ it means that internal buffer was full and the write should be repeated. Finally,
the slave select is de-asserted. See Figure 6.13 for an example of this.
Figure 6.13 VNC1L Mode Data Write
Data reads are similar, with the data from Slave to Master coming on the MISO pin. If the status bit is ‘0’
it means the data byte sent is new data that has not been read before. If it is ‘1’ it means that it is old
data. See Figure 6.14 for an example.
Figure 6.14 VNC1L Mode Data Read
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