Datasheet
Vinculum-II Embedded Dual USB Host Controller IC
Version 1.7
Document No.: FT_000138 Clearance No.: FTDI#143
6.3.5 Unmanaged Mode
The VNC2 SPI Slave also supports an unmanaged SPI mode. This is a simple data exchange between
Master and Slave. It operates in the standard 4 pin mode (SS#, CLK, MOSI and MISO) with all transfers
controlled by the SPI Master.
When the CPU wants to send data out of the SPI Slave it writes this into the spi_slave_data_tx register.
This will then be moved into the transfer shift register to wait for the SPI Master to request it. The SPI
Master will at some point assert SS# and start clocking data on MOSI with SCK. As this is shifted into the
transfer shift register, the SPI Slave will also be shifting data in the opposite direction on MISO. At the
end of the transfer the SPI Slave copies the received data from the shift register to spi_slave_data_rx as
seen in Figure 6.12.
SPI Master
SPI Slave
SPI
ss#
Clk Div
clk
mosi
0
0
1
1
2
2
3
4
5
5
6
6
7
7
0
0
1
1
2
3
4
5
6
6
7
7
Shift Register
Rx Shift Register
2
3
4
5
3
4
Tx Shift Register
Shift Register
miso
Figure 6.12 Unmanaged Mode Transfer Diagram
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