FT4232H QUAD HIGH SPEED USB TO MULTIPURPOSE UART/MPSSE IC
Datasheet
Version 2.4
Document No.: FT_000060 Clearance No.: FTDI#78
3.2.2
Pin Descriptions for FT4232H-56Q
This section describes the operation of the FT4232H-56Q pins for 56-pin VQFN package. The function of
many pins is determined by the configuration of the FT4232H-56Q. The following table details the function
of each pin dependent on the configuration of the interface. Each of the functions is described in Table 3.8.
(Note: The convention used throughout this document for active low signals is the signal name followed by
#)
FT4232H-56Q
Pins
Pin Name
Pin functions (depend on configuration)
ASYNC Serial
(RS232)
ASYNC Bit-
bang
SYNC Bit-
bang
Pin #
MPSSE
Channel A
12
13
14
15
17
18
19
20
ADBUS0
ADBUS1
ADBUS2
ADBUS3
ADBUS4
ADBUS5
ADBUS6
ADBUS7
TXD
RXD
D0
D1
D2
D3
D4
D5
D6
D7
D0
D1
D2
D3
D4
D5
D6
D7
TCK/SK
TDI/DO
TDO/DI
TMS/CS
GPIOL0
GPIOL1
GPIOL2
GPIOL3
RTS#
CTS#
DTR#
DSR#
DCD#
RI#/ TXDEN*
Channel B
22
23
24
25
26
27
28
29
BDBUS0
BDBUS1
BDBUS2
BDBUS3
BDBUS4
BDBUS5
BDBUS6
BDBUS7
TXD
RXD
D0
D1
D2
D3
D4
D5
D6
D7
D0
D1
D2
D3
D4
D5
D6
D7
TCK/SK
TDI/DO
TDO/DI
TMS/CS
GPIOL0
GPIOL1
GPIOL2
GPIOL3
RTS#
CTS#
DTR#
DSR#
DCD#
RI#/ TXDEN*
Channel C
32
33
34
35
37
38
39
40
CDBUS0
CDBUS1
CDBUS2
CDBUS3
CDBUS4
CDBUS5
CDBUS6
CDBUS7
TXD
RXD
D0
D1
D2
D3
D4
D5
D6
D7
D0
D1
D2
D3
D4
D5
D6
D7
RS232 or Bit-Bang interface
RS232 or Bit-Bang interface
RS232 or Bit-Bang interface
RS232 or Bit-Bang interface
RS232 or Bit-Bang interface
RS232 or Bit-Bang interface
RS232 or Bit-Bang interface
RS232 or Bit-Bang interface
RTS#
CTS#
DTR#
DSR#
DCD#
RI#/ TXDEN*
Channel D
42
46
47
48
49
51
52
53
54
30
DDBUS0
DDBUS1
DDBUS2
DDBUS3
DDBUS4
DDBUS5
DDBUS6
DDBUS7
PWREN#
SUSPEND#
TXD
RXD
D0
D1
D2
D3
D4
D5
D6
D7
D0
D1
RS232 or Bit-Bang interface
RS232 or Bit-Bang interface
RS232 or Bit-Bang interface
RS232 or Bit-Bang interface
RS232 or Bit-Bang interface
RS232 or Bit-Bang interface
RS232 or Bit-Bang interface
RS232 or Bit-Bang interface
PWREN#
RTS#
CTS#
D2
D3
DTR#
D4
DSR#
D5
DCD#
D6
D7
PWREN#
RI#/ TXDEN*
PWREN#
SUSPEND#
PWREN#
SUSPEND#
SUSPEND#
SUSPEND#
Configuration memory interface
1
EECS
EECLK
EEDATA
56
55
Table 3.8 FT4232H Pin Configurations for 56-Pin VQFN Package
* RI#/ or TXDEN is selectable in the EEPROM. Default is RI#.
Copyright © Future Technology Devices International Limited
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