FT260 HID-CLASS USB TO UART/I2C BRIDGE IC
Version 1.1
Document No.: FT_001272 Clearance No.: FTDI#484
The following figure shows the basic I2C bus protocol
Figure 5.1 I2C Bus Protocol
The master is initially in master transmit mode by sending a start bit followed by the 7-bit address of the
slave it wishes to communicate with, which is finally followed by a single bit representing whether it
wishes to write(0) to or read(1) from the slave.
If the slave exists on the bus then it will respond with an ACK bit (active low for acknowledged) for that
address. The master then continues in either transmit or receive mode (according to the read/write bit it
sent), and the slave continues in its complementary mode (receive or transmit, respectively).
The address and the data bytes are sent most significant bit first. The start bit is indicated by a high-to-
low transition of SDA with SCL high; the stop bit is indicated by a low-to-high transition of SDA with SCL
high.
If the master wishes to write to the slave then it repeatedly sends a byte with the slave sending an ACK
bit. (In this situation, the master is in master transmit mode and the slave is in slave receive mode.)
If the master wish to read from the slave then it repeatedly receives a byte from the slave, the master
sends an ACK bit after every byte but the last one. (In this situation, the master is in master receive
mode and the slave is in slave transmit mode.). The master then ends transmission with a stop bit, or it
may send another START bit if it wishes to retain control of the bus for another transfer (a "combined
message").
I²C defines three basic types of message, each of which begins with a START and ends with a STOP:
.
.
.
Single message where a master writes data to a slave;
Single message where a master reads data from a slave;
Combined messages, where a master issues at least two reads and/or writes to one or more
slaves
In a combined message, each read or write begins with a START and the slave address. After the first
START, these are also called repeated START bits; repeated START bits are not preceded by STOP bits,
which is how slaves know the next transfer is part of the same message.
Users can refer to the I2C specification for more information on the protocol.
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