Document No.: FT_000053
FT232R USB UART IC Datasheet Version 2.07
Clearance No.: FTDI# 38
2 FT232R Block Diagram
VCC
SLEEP#
Baud Rate
Generator
48MHz
3.3 Volt
LDO
Regulator
3V3OUT
FIFO RX
Buffer
DBUS0
DBUS1
DBUS2
DBUS3
DBUS4
DBUS5
DBUS6
DBUS7
USB
Transceiver
with
Integrated
Series
UART Controller
with
Programmable
Signal Inversion
USBDP
USBDM
Serial Interface
Engine
USB
Protocol Engine
UART
FIFO Controller
( SIE )
Resistors
and 1.5K
CBUS0
CBUS1
CBUS2
CBUS3
CBUS4
Pull-
up
Internal
EEPROM
USB DPLL
3V3OUT
FIFO TX Buffer
OSCO
(optional)
Internal
12MHz
Oscillator
Reset
Generator
x4 Clock
Multiplier
RESET#
To USB Transeiver Cell
48MHz
OCSI
(optional)
TEST
GND
Figure 2.1 FT232R Block Diagram
For a description of each function please refer to Section 4.
Copyright © 2010 Future Technology Devices International Limited
4
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