Document No.: FT_000589
FT313H USB2.0 HS Host Controller Datasheet Version 1.1
Clearance No.: FTDI# 318
Bit
Name
Type
Default
value
Description
00b 3750 clocks (30 MHz) = 1500 clocks (12 MHz) = 125 µs
01b 3500 clocks (30 MHz) = 1400 clocks (12 MHz) = 116 µs
10b 3250 clocks (30 MHz) = 1300 clocks (12 MHz) = 108 µs
11b 4000 clocks (30 MHz) = 1600 clocks (12 MHz) = 133 µs
Asynchronous Schedule Sleep Timer
[1:0]
ASYN_SCH_SLPT
R/W
2’b01
Controls the Asynchronous Schedule sleep timer.
00b
01b
10b
11b
5 µs
10 µs
15 µs
20 µs
Table 5-12 EOF time and asynchronous schedule sleep timer register
5.3.2 CHIPID register (address = 80h)
This chip ID register contains the chip identification and hardware version numbers.
Bit
Name
Type
Default value
Description
Chip ID
[31:0]
CHIP_ID
RO
32’h03130001
Table 5-13 Chip ID register
5.3.3 HWMODE register (address = 84h)
Bit
Name
Type
Default value
Description
[15: 8]
Reserved
RO
8’b0
-
Host Speed Type
Indicate the speed type of attached
device
[7: 6]
HOST_SPD_TYP
RO
2’b00
2’b10:
2’b00:
2’b01:
HS
FS
LS
2’b11:
Reserved
5
4
3
DACK_POL
DREQ_POL
INTF_LOCK
R/W
R/W
R/W
1’b0
1’b0
1’b0
DACK Polarity
0: active LOW
1: active HIGH
DREQ Polarity
0: active LOW
1: active HIGH
Interface Lock
0: Unlock the bus interface
1: Lock the bus interface
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