Thermal
Conductivity
Value
Unit
Lid
(12
×
14
×
1 mm)
k
x
k
y
k
z
360
360
360
z
W/(m
×
K)
Lid
Die
Substrate and solder balls
Side View of Model (Not to Scale)
Adhesive
Bump/underfill
Lid Adhesive—Collapsed resistance
(10
×
12
×
0.050 mm)
k
x
k
y
k
z
Die
(10
×
12
×
0.76 mm)
1
1
1
x
Substrate
Bump/Underfill—Collapsed resistance
(10
×
12
×
0.070 mm)
k
x
k
y
k
z
0.6
0.6
1.9
y
Top View of Model (Not to Scale)
Heat Source
Substrate and Solder Balls
(29
×
29
×
1.47 mm)
k
x
k
y
k
z
10.2
10.2
1.6
Figure 45. MPC8540 Thermal Model
16.2.2 Internal Package Conduction Resistance
For the packaging technology, shown in
the intrinsic internal conduction thermal resistance paths
are as follows:
• The die junction-to-case thermal resistance
• The die junction-to-board thermal resistance
depicts the primary heat transfer path for a package with an attached heat sink mounted to a
printed-circuit board.
MPC8540 Integrated Processor Hardware Specifications, Rev. 4
82
Freescale Semiconductor
FREESCALE [ FREESCALE SEMICONDUCTOR, INC ]
