Pinout
80
64
48
32
Pin Name
Default
ALT0
ALT1
ALT2
ALT3
ALT4
ALT5
ALT6
ALT7
LQFP LQFP
QFN
QFN
64
65
66
67
68
69
70
71
72
73
74
75
76
77
52
53
54
55
56
—
—
—
—
57
58
59
60
61
40
—
—
—
—
—
—
—
—
41
42
43
44
45
28
—
—
—
—
—
—
—
—
—
—
—
—
29
PTC7
CMP0_IN1
CMP0_IN2
CMP0_IN3
DISABLED
DISABLED
DISABLED
DISABLED
DISABLED
DISABLED
DISABLED
ADC0_SE5b
DISABLED
DISABLED
DISABLED
CMP0_IN1
CMP0_IN2
CMP0_IN3
PTC7
SPI0_MISO
I2C0_SCL
I2C0_SDA
I2C1_SCL
I2C1_SDA
SPI0_MOSI
PTC8
PTC8
TPM0_CH4
TPM0_CH5
PTC9
PTC9
PTC10
PTC11
PTC12
PTC13
PTC16
PTC17
PTD0
PTC10
PTC11
PTC12
PTC13
PTC16
PTC17
PTD0
TPM_CLKIN0
TPM_CLKIN1
SPI0_PCS0
SPI0_SCK
SPI0_MOSI
SPI0_MISO
SPI1_PCS0
TPM0_CH0
TPM0_CH1
TPM0_CH2
TPM0_CH3
TPM0_CH4
PTD1
ADC0_SE5b
PTD1
PTD2
PTD2
UART2_RX
UART2_TX
UART2_RX
SPI0_MISO
SPI0_MOSI
PTD3
PTD3
PTD4/
PTD4/
LLWU_P14
LLWU_P14
78
79
62
63
46
47
30
31
PTD5
ADC0_SE6b
ADC0_SE7b
ADC0_SE6b
ADC0_SE7b
PTD5
SPI1_SCK
UART2_TX
UART0_RX
TPM0_CH5
PTD6/
LLWU_P15
PTD6/
LLWU_P15
SPI1_MOSI
SPI1_MISO
SPI1_MOSI
80
64
48
32
PTD7
DISABLED
PTD7
SPI1_MISO
UART0_TX
8.2 KL24 Pinouts
The below figures show the pinout diagrams for the devices supported by this document.
Many signals may be multiplexed onto a single pin. To determine what signals can be
used on which pin, see the previous section.
KL24 Sub-Family Data Sheet Data Sheet, Rev. 3, 9/19/2012.
Freescale Semiconductor, Inc.
43
FREESCALE [ Freescale ]
