General
Unit
Table 6. Low power mode peripheral adders — typical value (continued)
Symbol
Description
Temperature (°C)
-40
25
50
70
85
105
IEREFSTEN32KHz
External 32 kHz crystal clock adder by
means of the OSC0_CR[EREFSTEN
and EREFSTEN] bits. Measured by
entering all modes with the crystal
enabled.
440
440
490
510
510
490
490
490
560
560
540
540
540
560
560
560
560
560
560
560
570
570
570
610
610
580
580
680
680
680
VLLS1
VLLS3
LLS
nA
VLPS
STOP
ICMP
CMP peripheral adder measured by
placing the device in VLLS1 mode with
CMP enabled using the 6-bit DAC and a
single external input for compare.
22
22
22
22
22
22
µA
nA
Includes 6-bit DAC power consumption.
IRTC
RTC peripheral adder measured by
placing the device in VLLS1 mode with
external 32 kHz crystal enabled by
means of the RTC_CR[OSCE] bit and
the RTC ALARM set for 1 minute.
Includes ERCLK32K (32 kHz external
crystal) power consumption.
432
357
388
475
532
810
IUART
UART peripheral adder measured by
placing the device in STOP or VLPS
mode with selected clock source waiting
for RX data at 115200 baud rate.
Includes selected clock source power
consumption.
66
66
66
66
66
66
µA
MCGIRCLK (4MHz internal reference
clock)
214
237
246
254
260
268
OSCERCLK (4MHz external crystal)
ITPM
TPM peripheral adder measured by
placing the device in STOP or VLPS
mode with selected clock source
configured for output compare
generating 100Hz clock signal. No load
is placed on the I/O generating the clock
signal. Includes selected clock source
and I/O switching currents.
µA
µA
MCGIRCLK (4MHz internal reference
clock)
86
86
86
86
86
86
OSCERCLK (4MHz external crystal)
235
45
256
45
265
45
274
45
280
45
287
45
IBG
Bandgap adder when BGEN bit is set
and device is placed in VLPx, LLS, or
VLLSx mode.
Table continues on the next page...
KL24 Sub-Family Data Sheet Data Sheet, Rev. 3, 9/19/2012.
Freescale Semiconductor, Inc.
17
FREESCALE [ Freescale ]
