General
Table 3. Voltage and current operating behaviors (continued)
Symbol
RPU
Description
Min.
20
Max.
50
Unit
kΩ
Notes
Internal pullup resistors
Internal pulldown resistors
3
4
RPD
20
50
kΩ
1. PTB0, PTB1, PTD6, and PTD7 I/O have both high drive and normal drive capability selected by the associated
PTx_PCRn[DSE] control bit. All other GPIOs are normal drive only.
2. Measured at VDD = 3.6 V
3. Measured at VDD supply voltage = VDD min and Vinput = VSS
4. Measured at VDD supply voltage = VDD min and Vinput = VDD
5.2.4 Power mode transition operating behaviors
All specifications except tPOR and VLLSx→RUN recovery times in the following table
assume this clock configuration:
• CPU and system clocks = 48 MHz
• Bus and flash clock = 24 MHz
• FEI clock mode
Table 4. Power mode transition operating behaviors
Symbol Description
Min.
Typ.
Max.
Unit
Notes
tPOR After a POR event, amount of time from the point
—
—
300
μs
VDD reaches 1.8 V to execution of the first
instruction across the operating temperature
range of the chip.
• VLLS0 → RUN
• VLLS1 → RUN
• VLLS3 → RUN
• LLS → RUN
—
—
—
—
—
—
95
93
42
4
115
115
53
μs
μs
μs
μs
μs
μs
4.6
4.4
4.4
• VLPS → RUN
• STOP → RUN
4
4
KL24 Sub-Family Data Sheet Data Sheet, Rev. 3, 9/19/2012.
Freescale Semiconductor, Inc.
13
FREESCALE [ Freescale ]
