General
Table 5. Power mode transition operating behaviors
Symbol
tPOR
Description
Min.
Max.
Unit
Notes
After a POR event, amount of time from the point VDD
reaches 1.71 V to execution of the first instruction
across the operating temperature range of the chip.
—
300
μs
1
—
—
—
—
—
—
112
74
μs
μs
μs
μs
μs
μs
• VLLS1 → RUN
• VLLS2 → RUN
• VLLS3 → RUN
• LLS → RUN
73
5.9
5.8
4.2
• VLPS → RUN
• STOP → RUN
1. Normal boot (FTFL_OPT[LPBOOT]=1)
5.2.5 Power consumption operating behaviors
Table 6. Power consumption operating behaviors
Symbol Description
Min.
Typ.
Max.
Unit
Notes
IDDA
Analog supply current
—
—
See note
mA
1
IDD_RUN Run mode current — all peripheral clocks
disabled, code executing from flash
2
• @ 1.8V
• @ 3.0V
—
—
45
47
70
72
mA
mA
IDD_RUN Run mode current — all peripheral clocks
enabled, code executing from flash
3, 4
• @ 1.8V
• @ 3.0V
• @ 25°C
• @ 125°C
—
61
85
mA
—
—
—
63
72
35
71
87
—
mA
mA
mA
IDD_WAIT Wait mode high frequency current at 3.0 V — all
peripheral clocks disabled
2
5
6
IDD_WAIT Wait mode reduced frequency current at 3.0 V
— all peripheral clocks disabled
—
—
15
—
—
mA
mA
IDD_VLPR Very-low-power run mode current at 3.0 V — all
peripheral clocks disabled
N/A
Table continues on the next page...
K60 Sub-Family Data Sheet Data Sheet, Rev. 6, 9/2011.
16
Freescale Semiconductor, Inc.
FREESCALE [ Freescale ]
