Table 4. Pin Functions by Primary and Alternate Purpose (continued)
Drive
Pin
Group
Primary
Function
Secondary
Function
Tertiary
Quaternary
Function
Slew Rate / Pull-up /
Pin on
Pin on 81
MAPBGA LQFP/QFN
Pin on 64
Strength /
Function
Control1 Pull-down2 100 LQFP
Control1
UART 1
UCTS1
URTS1
URXD1
UTXD1
UCTS2
URTS2
URXD2
UTXD2
VSTBY
VDD
SYNCA
SYNCB
URXD2
UTXD2
—
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
—
PDSR[15] PSRR[15]
PDSR[14] PSRR[14]
PDSR[13] PSRR[13]
PDSR[12] PSRR[12]
PDSR[27] PSRR[27]
PDSR[26] PSRR[26]
PDSR[25] PSRR[25]
PDSR[24] PSRR[24]
—
—
—
—
—
—
—
—
—
—
98
4
C3
B1
B2
A2
—
61
2
100
99
27
30
28
29
55
63
62
—
—
—
—
37
—
UART 2
—
—
—
—
—
—
—
—
—
—
—
VSTBY
VDD
—
N/A
N/A
N/A
N/A
F8
—
—
1,2,14,22,
23,34,41,
D5,E3–E7, 1,10,20,39,5
F5
2
57,68,81,93
VSS
VSS
—
—
—
N/A
N/A
—
3,15,24,25,3 A1,A9,D4,D 11,21,38,
5,42,56,
6,F4,F6,J1
53,64
67,75,82,92
1
The PDSR and PSSR registers are described in the General Purpose I/O chapter. All programmable signals default to 2 mA drive and FAST slew rate in
normal (single-chip) mode.
All signals have a pull-up in GPIO mode.
These signals are multiplexed on other pins.
2
3
4
5
6
7
8
9
For primary and GPIO functions only.
Only when JTAG mode is enabled.
CLKMOD0 and CLKMOD1 have internal pull-down resistors; however, the use of external resistors is very strongly recommended.
For secondary and GPIO functions only.
RSTI has an internal pull-up resistor; however, the use of an external resistor is very strongly recommended.
For GPIO function. Primary Function has pull-up control within the GPT module.
FREESCALE [ Freescale ]
