Pinout
64-
pin
48-
pin
44-
pin
32-
pin
Default
ALT0
ALT1
ALT2
ALT3
ALT4
ALT5
ALT6
ALT7
EzPort
47
48
49
50
34
35
36
37
30
31
32
33
23
24
25
26
EXTAL2
VDD
EXTAL2
VDD
PTB6
VSS
VSS
EXTAL1
EXTAL1
PTB7
PTC0
I2C1_SDA
I2C1_SCL
TMR_CLKI
N1
51
38
34
27
XTAL1
XTAL1
TMR_CLKI
N0
RGPIO0
52
53
54
55
56
57
39
—
—
—
40
41
35
—
—
—
36
37
28
—
—
—
—
29
RESET_b
CMP0_IN0
Disabled
Disabled
PTC1
PTF0
PTF1
PTF2
PTF3
PTC2
RESET_b
SPI0_SS
CMP0_IN0
Disabled
FBa_AD5
SPI0_SCLK
SPI0_MISO
SPI0_MOSI
CMP0_OUT FBa_AD6
FBa_AD7
CMP0_IN1
CMP0_IN2
CMP0_IN3
CMP0_IN1
CMP0_IN2
CMP0_IN3
RGPIO1
RGPIO2
FBa_AD8
I2S0_TXD
UART1_RT
S_b
SPI1_SS
FBa_AD18
I2S0_TX_F
S
58
42
38
—
Disabled
Disabled
PTF4
UART1_CT
S_b
SPI1_SCLK
FBa_D3
FBa_AD19
I2S0_TX_B
CLK
59
60
43
44
39
40
—
—
Disabled
Disabled
Disabled
Disabled
PTF5
PTF6
UART1_RX SPI1_MISO
FBa_D2
FBa_D1
FBa_RW_b
FBa_AD9
I2S0_RXD
UART1_TX
SPI1_MOSI
I2S0_RX_F
S
61
62
45
46
41
42
—
Disabled
Disabled
Disabled
Disabled
PTF7
PTC3
UART0_RT
S_b
SPI0_SS
FBa_D0
FBa_AD10
I2S0_RX_B
CLK
30
UART0_CT
S_b
RGPIO3
SPI0_SCLK CLKOUT
USB_CLKIN I2S0_MCLK
/
I2S0_CLKIN
63
64
47
48
43
44
31
32
Disabled
Disabled
Disabled
Disabled
PTC4
PTC5
UART0_RX RGPIO4
SPI0_MISO PDB0_EXT
RG
USB_SOF_
PULSE
UART0_TX
RGPIO5
SPI0_MOSI CMT_IRO
8.2 Pinout diagrams
The following diagrams show pinouts for the 64-pin, 48-pin, 44-pin, and 32-pin
packages. These diagrams are representations for ease of reference. See the package
drawings for mechanical details.
For each pin, the diagrams show the default function or (when disabled is the default) the
ALT1 signal for a GPIO function. However, many signals may be multiplexed onto a
single pin.
MCF51JU128 Data Sheet, Rev. 4, 01/2012.
Freescale Semiconductor, Inc.
57
FREESCALE [ Freescale ]
