Memories and memory interfaces
3. Proper PC board layout procedures must be followed to achieve specifications.
4. Crystal startup time is defined as the time between the oscillator being enabled and the OSCINIT bit in the MCG_S register
being set.
6.4 Memories and memory interfaces
6.4.1 Flash (FTFL) electrical specifications
This section describes the electrical characteristics of the FTFL module.
6.4.1.1 Flash timing specifications — program and erase
The following specifications represent the amount of time the internal charge pumps are
active and do not include command overhead.
Table 16. NVM program/erase timing specifications
Symbol Description
thvpgm4 Longword Program high-voltage time
thversscr Sector Erase high-voltage time
Min.
Typ.
Max.
Unit
Notes
—
7.5
18
μs
—
—
—
13
52
113
452
ms
ms
ms
1
1
1
thversblk32k Erase Block high-voltage time for 32 KB
thversblk128k Erase Block high-voltage time for 128 KB
208
1808
1. Maximum time based on expectations at cycling end-of-life.
6.4.1.2 Flash timing specifications — commands
Table 17. Flash command timing specifications
Symbol Description
Read 1s Block execution time
Min.
Typ.
Max.
Unit
Notes
trd1blk32k
• 32 KB data flash
—
—
—
—
0.5
1.7
ms
ms
• 128 KB program flash
trd1blk128k
trd1sec1k
Read 1s Section execution time (data flash
sector)
—
—
60
μs
1
tpgmchk
trdrsrc
Program Check execution time
Read Resource execution time
Program Longword execution time
—
—
—
—
—
65
45
30
μs
μs
μs
1
1
tpgm4
145
Erase Flash Block execution time
• 32 KB data flash
2
tersblk32k
—
—
55
465
ms
ms
• 128 KB program flash
220
1850
tersblk128k
Table continues on the next page...
MCF51JU128 Data Sheet, Rev. 4, 01/2012.
Freescale Semiconductor, Inc.
27
FREESCALE [ Freescale ]
