Detailed Register Address Map
MSCAN Foreground Receive and Transmit Buffer Layout
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Extended ID
R
R
ID28
ID10
ID27
ID9
ID26
ID8
ID25
ID7
ID24
ID6
ID23
ID5
ID22
ID4
ID21
ID3
0xXXX0 Standard ID
CANxRIDR0
W
R
Extended ID
ID20
ID2
ID19
ID1
ID18
ID0
SRR=1
RTR
IDE=1
IDE=0
ID17
ID9
ID16
ID8
ID15
ID7
0xXXX1 Standard ID
CANxRIDR1
R
W
R
Extended ID
ID14
ID6
ID13
ID5
ID12
ID4
ID11
ID3
ID10
ID2
0xXXX2 Standard ID
CANxRIDR2
R
W
R
Extended ID
ID1
ID0
RTR
0xXXX3 Standard ID
CANxRIDR3
R
W
R
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
0xXXX4- CANxRDSR0-
0xXXXB CANxRDSR7
W
R
DLC3
DLC2
DLC1
DLC0
0xXXXC CANRxDLR
W
R
0xXXXD
Reserved
W
R
TSR15
TSR7
TSR14
TSR6
TSR13
TSR5
TSR12
TSR4
TSR11
TSR3
TSR10
TSR2
TSR9
TSR1
TSR8
TSR0
0xXXXE CANxRTSRH
W
R
0xXXXF CANxRTSRL
Extended ID
W
R
ID28
ID10
ID20
ID2
ID27
ID9
ID26
ID8
ID25
ID7
ID24
ID6
ID23
ID5
ID22
ID4
ID21
ID3
CANxTIDR0
0xXX10
W
R
Standard ID
W
R
Extended ID
ID19
ID1
ID18
ID0
SRR=1
RTR
IDE=1
IDE=0
ID10
ID17
ID16
ID15
CANxTIDR1
Standard ID
W
R
0xXX0x
XX10
W
R
Extended ID
CANxTIDR2
Standard ID
ID14
ID13
ID12
ID11
ID9
ID1
ID8
ID0
ID7
W
R
0xXX12
0xXX13
W
R
Extended ID
CANxTIDR3
Standard ID
ID6
DB7
ID5
DB6
ID4
DB5
ID3
DB4
ID2
RTR
W
R
W
R
0xXX14- CANxTDSR0–
0xXX1B CANxTDSR7
DB3
DLC3
PRIO3
DB2
DLC2
PRIO2
DB1
DLC1
PRIO1
DB0
DLC0
PRIO0
W
R
0xXX1C CANxTDLR
0xXX1D CANxTTBPR
W
R
PRIO7
PRIO6
PRIO5
PRIO4
W
S12P-Family Reference Manual, Rev. 1.13
Freescale Semiconductor
559
FREESCALE [ Freescale ]
