128 KByte Flash Module (S12FTMRC128K1V1)
Table 13-59. Erase Verify D-Flash Section Command FCCOB Requirements
CCOBIX[2:0]
FCCOB Parameters
Global address [17:16] to
000
0x10
identify the D-Flash block
001
010
Global address [15:0] of the first word to be verified
Number of words to be verified
Upon clearing CCIF to launch the Erase Verify D-Flash Section command, the Memory Controller will
verify the selected section of D-Flash memory is erased. The CCIF flag will set after the Erase Verify D-
Flash Section operation has completed.
Table 13-60. Erase Verify D-Flash Section Command Error Handling
Register
Error Bit
Error Condition
Set if CCOBIX[2:0] != 010 at command launch
Set if command not available in current mode (see Table 13-27)
Set if an invalid global address [17:0] is supplied
ACCERR
Set if a misaligned word address is supplied (global address [0] != 0)
Set if the requested section breaches the end of the D-Flash block
None
FSTAT
FPVIOL
MGSTAT1
MGSTAT0
Set if any errors have been encountered during the read
Set if any non-correctable errors have been encountered during the read
13.4.5.15 Program D-Flash Command
The Program D-Flash operation programs one to four previously erased words in the D-Flash block. The
Program D-Flash operation will confirm that the targeted location(s) were successfully programmed upon
completion.
CAUTION
A Flash word must be in the erased state before being programmed.
Cumulative programming of bits within a Flash word is not allowed.
Table 13-61. Program D-Flash Command FCCOB Requirements
CCOBIX[2:0]
FCCOB Parameters
Global address [17:16] to
000
0x11
identify the D-Flash block
001
010
011
100
Global address [15:0] of word to be programmed
Word 0 program value
Word 1 program value, if desired
Word 2 program value, if desired
S12P-Family Reference Manual, Rev. 1.13
Freescale Semiconductor
467
FREESCALE [ Freescale ]
