128 KByte Flash Module (S12FTMRC128K1V1)
13.3.2.9.1
P-Flash Protection Restrictions
The general guideline is that P-Flash protection can only be added and not removed. Table 13-20 specifies
all valid transitions between P-Flash protection scenarios. Any attempt to write an invalid scenario to the
FPROT register will be ignored. The contents of the FPROT register reflect the active protection scenario.
See the FPHS and FPLS bit descriptions for additional restrictions.
Table 13-20. P-Flash Protection Scenario Transitions
From
To Protection Scenario(1)
Protection
Scenario
0
1
X
X
2
3
X
X
X
X
X
X
X
X
4
5
6
7
X
X
0
1
2
3
4
5
6
7
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1. Allowed transitions marked with X, see Figure 13-14 for a definition of the scenarios.
13.3.2.10 D-Flash Protection Register (DFPROT)
The DFPROT register defines which D-Flash sectors are protected against program and erase operations.
Offset Module Base + 0x0009
7
6
5
4
3
2
1
0
R
W
0
0
0
DPOPEN
DPS[3:0]
Reset
F
0
0
0
F
F
F
F
= Unimplemented or Reserved
Figure 13-15. D-Flash Protection Register (DFPROT)
The (unreserved) bits of the DFPROT register are writable with the restriction that protection can be added
but not removed. Writes must increase the DPS value and the DPOPEN bit can only be written from 1
(protection disabled) to 0 (protection enabled). If the DPOPEN bit is set, the state of the DPS bits is
irrelevant.
During the reset sequence, the DFPROT register is loaded with the contents of the D-Flash protection byte
in the Flash configuration field at global address 0x3_FF0D located in P-Flash memory (see Table 13-3)
as indicated by reset condition F in Figure 13-15. To change the D-Flash protection that will be loaded
during the reset sequence, the P-Flash sector containing the D-Flash protection byte must be unprotected,
then the D-Flash protection byte must be programmed. If a double bit fault is detected while reading the
S12P-Family Reference Manual, Rev. 1.13
444
Freescale Semiconductor
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