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MC9S12P64CFT 参数 Datasheet PDF下载

MC9S12P64CFT图片预览
型号: MC9S12P64CFT
PDF下载: 下载PDF文件 查看货源
内容描述: 微控制器 [Microcontrollers]
分类和应用: 微控制器外围集成电路时钟
文件页数/大小: 566 页 / 7414 K
品牌: FREESCALE [ Freescale ]
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CAUTION  
A Flash word or phrase must be in the erased state before being  
programmed. Cumulative programming of bits within a Flash word or  
phrase is not allowed.  
The Flash memory may be read as bytes, aligned words, or misaligned words. Read access time is one bus  
cycle for bytes and aligned words, and two bus cycles for misaligned words. For Flash memory, an erased  
bit reads 1 and a programmed bit reads 0.  
It is possible to read from P-Flash memory while some commands are executing on D-Flash memory. It  
is not possible to read from D-Flash memory while a command is executing on P-Flash memory.  
Simultaneous P-Flash and D-Flash operations are discussed in Section 13.4.4.  
Both P-Flash and D-Flash memories are implemented with Error Correction Codes (ECC) that can resolve  
single bit faults and detect double bit faults. For P-Flash memory, the ECC implementation requires that  
programming be done on an aligned 8 byte basis (a Flash phrase). Since P-Flash memory is always read  
by half-phrase, only one single bit fault in an aligned 4 byte half-phrase containing the byte or word  
accessed will be corrected.  
13.1.1 Glossary  
Command Write Sequence — An MCU instruction sequence to execute built-in algorithms (including  
program and erase) on the Flash memory.  
D-Flash Memory — The D-Flash memory constitutes the nonvolatile memory store for data.  
D-Flash Sector — The D-Flash sector is the smallest portion of the D-Flash memory that can be erased.  
The D-Flash sector consists of four 64 byte rows for a total of 256 bytes.  
NVM Command Mode — An NVM mode using the CPU to setup the FCCOB register to pass parameters  
required for Flash command execution.  
Phrase — An aligned group of four 16-bit words within the P-Flash memory. Each phrase includes two  
sets of aligned double words with each set including 7 ECC bits for single bit fault correction and double  
bit fault detection within each double word.  
P-Flash Memory — The P-Flash memory constitutes the main nonvolatile memory store for applications.  
P-Flash Sector — The P-Flash sector is the smallest portion of the P-Flash memory that can be erased.  
Each P-Flash sector contains 512 bytes.  
Program IFR — Nonvolatile information register located in the P-Flash block that contains the Device  
ID, Version ID, and the Program Once field.  
S12P-Family Reference Manual, Rev. 1.13  
Freescale Semiconductor  
426  
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