S12 Clock, Reset and Power Management Unit (S12CPMU)
Figure 7-16. Voltage Access Select
V
BG
Ref
ATD
Channel
TEMPSENSE
VSEL
C
HTD
Table 7-13. CPMUHTCTL Field Descriptions
Description
Field
5
Voltage Access Select Bit — If set, the bandgap reference voltage VBG can be accessed internally (i.e.
multiplexed to an internal Analog to Digital Converter channel). If not set, the die temperature proportional
voltage VHT of the temperature sense can be accessed internally. See device level specification for connectivity.
0 An internal temperature proportional voltage VHT can be accessed internally.
VSEL
1 Bandgap reference voltage VBG can be accessed internally.
3
HTE
High Temperature Enable Bit — This bit enables the high temperature sensor.
0 The temperature sense is disabled.
1 The temperature sense is enabled.
2
High Temperature Detect Status Bit — This read-only status bit reflects the temperature. status. Writes have
no effect.
HTDS
0 Junction Temperature is below level THTID or RPM.
1 Junction Temperature is above level THTIA and FPM.
1
High Temperature Interrupt Enable Bit
0 Interrupt request is disabled.
HTIE
1 Interrupt will be requested whenever HTIF is set.
0
HTIF
High Temperature Interrupt Flag — HTIF — High Temperature Interrupt Flag
HTIF is set to 1 when HTDS status bit changes. This flag can only be cleared by writing a 1.
Writing a 0 has no effect. If enabled (HTIE=1), HTIF causes an interrupt request.
0 No change in HTDS bit.
1 HTDS bit has changed.
S12P-Family Reference Manual, Rev. 1.13
Freescale Semiconductor
221
FREESCALE [ Freescale ]
