Pulse-Width Modulator for Motor Control (PWMMC)
Addr.
Register Name
Bit 7
6
5
4
DT5
3
2
DT3
1
Bit 0
DT1
Read:
0
0
FTACK4
0
DT6
DT4
DT2
Fault Acknowledge Register
$0024
(FTACK) Write:
FTACK3
0
FTACK2
0
FTACK1
0
See page 165.
Reset:
Read:
0
0
0
0
0
PWM Output Control
OUTCTL
OUT6
OUT5
OUT4
OUT3
OUT2
OUT1
$0025
$0026
$0027
$0028
$0029
$002A
$002B
$002C
$002D
Register (PWMOUT) Write:
See page 166.
Reset:
0
0
0
0
0
0
0
0
0
0
0
0
Read:
Bit 11
Bit 10
Bit 9
Bit 8
PWM Counter Register High
(PCNTH) Write:
See page 156.
Reset:
0
0
0
0
0
0
0
0
Read: Bit 7
(PCNTL) Write:
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PWM Counter Register Low
See page 156.
Reset:
Read:
0
0
0
0
0
0
0
0
0
Bit 11
X
0
Bit 10
X
0
Bit 9
X
0
Bit 8
X
PWM Counter Modulo Register
High (PMODH) Write:
See page 156.
Reset:
0
Bit 7
X
0
Bit 6
X
0
Bit 5
X
0
Bit 4
X
Read:
PWM Counter Modulo Register
Bit 3
X
Bit 2
X
Bit 1
X
Bit 0
X
Low (PMODL) Write:
See page 156.
Reset:
Read:
PWM 1 Value Register High
Bit 15
0
Bit 14
0
Bit 13
0
Bit 12
0
Bit 11
0
Bit 10
0
Bit 9
0
Bit 8
0
(PVAL1H) Write:
See page 157.
Reset:
Read:
PWM 1 Value Register Low
Bit 7
0
Bit 6
0
Bit 5
0
Bit 4
0
Bit 3
0
Bit 2
0
Bit 1
0
Bit 0
0
(PVAL1L) Write:
See page 157.
Reset:
Read:
PWM 2 Value Register High
Bit 15
0
Bit 14
0
Bit 13
0
Bit 12
0
Bit 11
0
Bit 10
0
Bit 9
0
Bit 8
0
(PVAL2H) Write:
See page 157.
Reset:
Read:
PWM 2 Value Register Low
Bit 7
Bit 6
Bit 5
0
Bit 4
Bit 3
Bit 2
0
Bit 1
0
Bit 0
0
(PVAL2L) Write:
See page 157.
Reset:
0
0
0
0
R
= Reserved
Bold
= Buffered
X = Indeterminate
Figure 12-3. Register Summary (Sheet 2 of 3)
Data Sheet
130
MC68HC908MR32 • MC68HC908MR16 — Rev. 6.0
Pulse-Width Modulator for Motor Control (PWMMC) MOTOROLA