Memory
Addr.
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
Read:
$000D
$000E
$000F
$0010
$0011
$0012
$0013
$0014
$0015
Unimplemented Write:
Reset:
Read:
Unimplemented Write:
Reset:
Read:
Unimplemented Write:
Reset:
Read:
SPRIE
R
0
SPMSTR
CPOL
CPHA
SPWOM
0
SPE
0
SPTIE
0
SPI Control Register
(SPCR)
Write:
Reset:
0
1
0
1
Read:
SPRF
OVRF
MODF
SPTE
SPI Status and Control
ERRIE
MODFEN
SPR1
SPR0
Register Write:
(SPSCR)
Reset:
0
0
0
0
1
0
0
0
Read:
R7
T7
R6
T6
R5
T5
R4
T4
R3
T3
R2
T2
R1
T1
R0
T0
SPI Data Register
(SPDR)
Write:
Reset:
Read:
Unaffected by reset
LOOPS
0
ENSCI
TXINV
0
M
0
WAKE
0
ILTY
0
PEN
0
PTY
0
SCI Control Register 1
(SCC1)
Write:
Reset:
Read:
0
TCIE
0
SCTIE
SCRIE
0
ILIE
0
TE
RE
0
RWU
0
SBK
0
SCI Control Register 2
(SCC2)
Write:
Reset:
Read:
0
0
R8
T8
DMARE
DMATE
ORIE
NEIE
FEIE
PEIE
SCI Control Register 3
(SCC3)
Write:
Reset:
Read:
U
U
0
0
0
0
0
0
SCTE
TC
SCRF
IDLE
OR
NF
FE
PE
$0016 SCI Status Register 1 (SCS1) Write:
Reset:
1
0
1
0
0
0
0
0
0
0
0
0
0
0
Read:
$0017 SCI Status Register 2 (SCS2) Write:
Reset:
BKF
RPF
0
0
0
0
0
0
0
0
Read:
R7
T7
R6
T6
R5
T5
R4
T4
R3
T3
R2
T2
R1
T1
R0
T0
SCI Data Register
(SCDR)
$0018
$0019
Write:
Reset:
Read:
Write:
Reset:
Unaffected by reset
0
0
0
SCP1
0
SCP0
R
0
SCR2
SCR1
SCR0
0
SCI Baud Rate Register
(SCBR)
0
0
0
0
U = Unaffected
X = Indeterminate
= Unimplemented
R
= Reserved
Figure 2-2. Control, Status, and Data Registers (Sheet 2 of 9)
MC68HC908AP Family Data Sheet, Rev. 4
32
Freescale Semiconductor
FREESCALE [ Freescale ]
