Monitor ROM
Addr.
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Write:
Reset:
Read:
Write:
Reset:
Read:
PTA7
PTA6
PTA5
PTA4
PTA3
PTA2
PTA1
PTB1
PTC1
PTD1
PTA0
PTB0
PTC0
PTD0
Port A Data Register
(PTA)
$0000
Unaffected by reset
PTB4 PTB3
Unaffected by reset
PTC4 PTC3
Unaffected by reset
PTD4 PTD3
Unaffected by reset
PTB7
PTC7
PTD7
PTB6
PTC6
PTD6
PTB5
PTC5
PTD5
PTB2
PTC2
PTD2
Port B Data Register
(PTB)
$0001
$0002
$0003
$0004
$0005
$0006
$0007
$0008
$0009
$000A
$000B
$000C
Port C Data Register (PTC) Write:
Reset:
Read:
Port D Data Register (PTD) Write:
Reset:
Read:
DDRA7
DDRA6
DDRA5
DDRA4
DDRA3
DDRA2
DDRA1
DDRA0
Data Direction Register A
(DDRA)
Write:
Reset:
Read:
0
0
0
0
0
0
0
0
DDRB7
DDRB6
DDRB5
DDRB4
DDRB3
DDRB2
DDRB1
DDRB0
Data Direction Register B
(DDRB)
Write:
Reset:
Read:
0
DDRC7
0
0
DDRC6
0
0
DDRC5
0
0
DDRC4
0
0
DDRC3
0
0
DDRC2
0
0
DDRC1
0
0
DDRC0
0
Data Direction Register C
(DDRC)
Write:
Reset:
Read:
DDRD7
0
DDRD6
0
DDRD5
0
DDRD4
0
DDRD3
0
DDRD2
0
DDRD1
0
DDRD0
0
Data Direction Register D
(DDRD)
Write:
Reset:
Read:
Unimplemented
Write:
Reset:
Read:
Unimplemented Write:
Reset:
Read:
Unimplemented Write:
Reset:
Read:
Unimplemented Write:
Reset:
Read:
Port-A LED Control
LEDA7
0
LEDA6
0
LEDA5
0
LEDA4
0
LEDA3
0
LEDA2
LEDA1
LEDA0
0
Register Write:
(LEDA)
Reset:
0
0
U = Unaffected
X = Indeterminate
= Unimplemented
R
= Reserved
Figure 2-2. Control, Status, and Data Registers (Sheet 1 of 9)
MC68HC908AP Family Data Sheet, Rev. 4
Freescale Semiconductor
31
FREESCALE [ Freescale ]
